
Text extracted from the exhibit documents filed with the FCC. Open a document above to read the original.
file://C:\WINDOWS\Desktop\Lock Block Diagram.JPG 9/18/00
Theory of Operation Ensure Technologies Lock XCLK-1 Please refer to the block diagram for the following discussion: The Receiver is a conventional single conversion FM receiver. The receive frequency is set by the PLL synthesizer (schematic pages 1 and 2). The signal is a Gaussian shift keyed FSK. The output of the demodulator is digitized and applied to the signal processing microprocessor (schematic page 3). This processor continually applies a matched filter to the received signal looking for a valid signal. The signal processor shares the same crystal as the PLL synthesizer. When a valid signal is received, the data is passed up to the Interface microprocessor. This device can connect to a computer, using a USB, PS2, or RS-232 interface. In addition, the interface micro can also interface to a local area network. The receiver uses an internal antenna and can change the pattern of the antenna upon command from the PC. This is done by switching in different antenna elements using the RF switch shown on the schematic page 2.
1301 Beal Ave. ยท Ann Arbhor, Michigan ยท United States
| # | Rule Parts | Frequency Range | Power Output |
|---|---|---|---|
| 1 | 15B | 904 MHz - 906 MHz | - |

XyLoc KeyCard - Electronic Key for PC
Equipment Class
DXX - Part 15 Low Power Communication Device Transmitter
Desktop Computer Security Lock
Equipment Class
DXX - Part 15 Low Power Communication Device Transmitter