NX5DSSR-250CPulsar Digital Solid-State Radar System

RVP8 Digital IF Receiver/Doppler Signal Processor User’s Manual March 2006 E Copyright 2006 SIGMET, Inc. The designs and descriptions contained in this manual may not be copied, translated or reproduced in any form without the prior written consent of SIGMET, Inc. Table of Contents RVP8 User’s Manual 29 March 2006 i Table of Contents Hardware Limited Warrantyxii . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Prefacexiii . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1. Introduction and Specifications1–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1System Configuration Concepts1–4 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1.1IFD IF Digitizer1–9 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1.2Digital Receiver PCI Card (RVP8/Rx)1–10 . . . . . . . . . . . . . . . . . . . . . . . . 1.1.3Mother Board or Single-Board Computer (SBC)1–13 . . . . . . . . . . . . . . . . 1.1.4Digital Transmitter PCI Card (RVP8/Tx)1–13 . . . . . . . . . . . . . . . . . . . . . . 1.1.5I/O-62 PCI Card and I/O Panel1–15 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2Comparison of Analog vs Digital Radar Receivers1–17 . . . . . . . . . . . . . . . . . . . . . 1.2.1What is a Digital IF Receiver?1–17 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.2Magnetron Receiver Example1–18 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.2.3Klystron or TWT Receiver and Transmit RF Example1–20 . . . . . . . . . . . . 1.3RVP8 IF Signal Processing1–21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3.1IFD Data Capture and Timing1–21 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.3.2Burst Pulse Analysis for Amplitude/Frequency/Phase1–22 . . . . . . . . . . . . 1.3.3Rx Board and CPU IF to I/Q Processing1–23 . . . . . . . . . . . . . . . . . . . . . . . 1.4RVP8 Weather Signal Processing1–25 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.1General Processing features1–26 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.2RVP8 Pulse Pair Time Domain Processing1–29 . . . . . . . . . . . . . . . . . . . . . 1.4.3RVP8 DFT/FFT Processing1–29 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.4Random Phase Processing for 2nd Trip Echo1–30 . . . . . . . . . . . . . . . . . . . 1.4.5Polarization Mode Processing1–30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4.6Output Data1–30 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5RVP8 Control and Maintenance Features1–31 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.1Radar Control Functions1–31 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.2Power-Up Setup Configuration1–32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5.3Built-In Diagnostics1–32 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.6Support Utilities and Available Application Software1–33 . . . . . . . . . . . . . . . . . . 1.7System Network Architecture1–34 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.8Open Architecture and Published API1–35 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9RVP8 Technical Specifications1–36 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9.1IFD Digitizer Module, Rev E or later1–36 . . . . . . . . . . . . . . . . . . . . . . . . . 1.9.2RVP8/Rx PCI Card, Rev C or later1–37 . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9.3RVP8/Tx PCI Card1–38 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9.4SIGMET I/O-62 PCI Card1–39 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9.5I/O-62 Standard Connector Panel1–40 . . . . . . . . . . . . . . . . . . . . . . . . . . . . Table of Contents RVP8 User’s Manual 29 March 2006 ii 1.9.6RVP8 Processing Algorithms1–41 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9.7RVP8 Input/Output Summary1–43 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.9.8Physical and Environmental Characteristics1–44 . . . . . . . . . . . . . . . . . . . . 2. Hardware Installation2–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1Overview and Input Power Requirements2–1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2IFD IF Digitizer Module Installation2–2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.1IFD Introduction2–2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.2IFD Revision History2–3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.3IFD Power, Size and Mounting Considerations2–4 . . . . . . . . . . . . . . . . . 2.2.4IFD I/O Summary2–5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.5IFD Adjustments and Test/Status Indicators2–6 . . . . . . . . . . . . . . . . . . . . 2.2.6IFD Input A/D Saturation Levels2–8 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.7IF Bandwidth and Dynamic Range2–9 . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.8IF Gain and System Performance2–11 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.9IF Gain Based on System Noise Figure2–13 . . . . . . . . . . . . . . . . . . . . . . . . 2.2.10Choice of Intermediate Frequency2–14 . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.11IFD Analog AFC Output Voltage (Optional)2–15 . . . . . . . . . . . . . . . . . . . 2.2.12IFD Reference Clock Input (Optional)2–15 . . . . . . . . . . . . . . . . . . . . . . . . 2.2.13Communications Between the IFD and RVP8/Rx2–17 . . . . . . . . . . . . . . . . 2.2.14Summary of Crystal and Filter Configurations2–18 . . . . . . . . . . . …

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Preface RVP8 User’s Manual April 2003 xii Hardware Limited Warranty SIGMET, Inc. warrants its IRIS hardware (RVP8 and RCP8) to function according to the hardware User’s Manual documentation for a period of one year following delivery. In the event of a failure during the warranty period, the customer should notify SIGMET to obtain a Return Authorization. Upon receiving the Return Authorization from SIGMET, the customer ships the failed unit to SIGMET by pre-paid freight. SIGMET, at its option, will repair or replace the defective unit within 30 days and return the unit to the customer. Damage caused by fire, flood, lightning, or other catastrophe, and damage caused by misuse or abuse are not covered by this warranty. In no event shall SIGMET, Inc. be liable for any direct, indirect, special, incidental, or consequential damages arising out of the use or inability to use the hardware or documentation provided by SIGMET, Inc. SIGMET, Inc. makes no warranty, either express or implied, with respect to any of the hardware or documentation, as to the quality, performance, merchantability, or fitness for a particular purpose. Preface RVP8 User’s Manual April 2003 xiii Preface This manual provides technical information on the RVP8 digital receiver and Doppler signal processor. About This Manual This manual is used primarily by engineers for installation and troubleshooting, or by users interested in understanding the signal processing features, algorithms, and control and data formats. Chapter 1, Introduction and Specifications, describes the major features of the RVP8 signal processor and gives its technical specifications. Chapter 2, Hardware Installation, discusses the electrical issues involved with installing the RVP8 processor and IFD receiver module. This includes power supply connections, radar analog and digital signal interfaces and computer interface connections. Software installation is covered in a separate Appendix. Chapter 3, TTY Nonvolatile Setups, continues the installation discussion by describing how to use the local TTY to configure the actual operation of the RVP8. This includes a detailed description of the (approximately one hundred) setup parameters that affect the operation of the RVP8. Chapter 4, Plot-Assisted Setups, completes the installation discussion by using the oscilloscope plotting modes to configure and align the radar receiver, and measure its performance. Chapter 5, Processing Algorithms, gives mathematical descriptions of the processing algorithms implemented in the RVP8 signal processor. This information can be useful to those writing their own interface to the RVP8, or for those who want to learn more about the internal workings of the signal processor. Chapter 6, Host Computer Commands, contains a description of the digital commands that the host computer must use to set up and control the RVP8 processor. The introductory section discusses processor I/O in general, and gives an overview of how to set up the RVP8 for recording data. Each command is then detailed in subsequent sections. The appendixes give information on software installation and backup, the RVP8 standard chassis, and clutter filter characteristics. Preface RVP8 User’s Manual April 2003 xiv Where to Find More Information The following manuals are also available from SIGMET, Inc.: IRIS Installation Manual Describes the procedures for installing and upgrading IRIS and the specific hardware and software configuration for your facility. IRIS Radar Manual Describes the IRIS/Radar software. This manual is for radar operators. IRIS Product & Display Manual Describes the IRIS/Analysis product generation software and the IRIS/Display software. IRIS Utilities Manual Describes the utility programs for system alignment, calibration, installation and testing. IRIS Programmer’s Manual Describes the data formats and library routines used by IRIS. This manual is for programmers who want to access IRIS data or interface to IRIS processes. The RCP8 User’s Manual Describes the installation, operation and technical details of the Radar Control Processor. The RCP8 is an interface between the IRIS software and miscellaneous hardware such as the antenna and transmitter. SIGMET, Inc. encourages you to send your comments and/or corrections to: SIGMET, Inc. 2 Park Drive, Suite 1 Westford, Massachusetts 01886 USA FAX (978)692–9575 EMAIL [email protected] Documentation Conventions The following conventions are used throughout this manual: promptSome features of the RVP8 operate by displaying questions and waiting for you to type an answer. The text of prompts is displayed in bold, monospaced type. This margin icon indicates a note that may be of interest to the reader. This margin icon indicates a note that is important to the reader. This margin icon indicates a caution or warning to the reader.

Introduction and Specifications RVP8 User’s Manual March 2006 1–1 1.Introduction and Specifications The RVP8 Lineage SIGMET Inc. has a 20-year history of supplying innovative, high-quality signal processing products to the weather radar community. The history of SIGMET products reads like a history of weather radar signal processing: Year Model Units Sold Major Technical Milestones 1981FFT10First commercial FFT-based Doppler signal processor for weath- er radar applications. Featured Simultaneous Doppler and inten- sity processing. 1985RVP5161First single-board low-cost Doppler signal processor. First com- mercial application of dual PRF velocity unfolding algorithm. 1986PP0212First high-performance commercial pulse pair processor with 18.75-m bin spacing and 1024 bins. 1992RVP6150First commercial floating-point DSP-chip based processor. First commercial processor to implement selectable pulse pair, FFT or random phase 2nd trip echo filtering. 1996RVP7>200First commercial processor to implement fully digital IF process- ing for weather radar. 2003 RVP8First digital receiver/signal processor to be implemented using an open hardware and software architecture on standard PC hard- ware under the Linux operating system. Public API’s are pro- vided so that customers may implement their own custom proc- essing algorithms. Much of the proven, tested, documented software from the highly-successful RVP7 (written in C) is ported directly to the new RVP8 architecture. This allows SIGMET to reduce time-to-market and produce a high-quality, reliable system from day one. However, the new RVP8 is not simply a re-hosting of the RVP7. The RVP8 provides new capabilities for weather radar systems that, until now, were not available outside of the research community. Advanced Digital Transmitter Option For example, the RVP8 takes the next logical step after a digital receiver- a digitally synthesized IF transmit waveform output that is mixed with the STALO to provide the RF waveform to the transmitter amplifier (e.g., Klystron or TWT). The optional RVP8/Tx card opens the door for advanced processing algorithms such as pulse compression, frequency agility and phase agility that were not possible before, or done in more costly ways. Introduction and Specifications RVP8 User’s Manual March 2006 1–2 Open Hardware and Software Design Compared to previous processors that were built around proprietary DSP chips, perhaps the most innovative aspect of the RVP8 is that it is implemented on standard PC hardware and software that can be purchased from a wide variety of sources. The Intel Pentium/PCI approach promises continued improvement in processor speed, bus bandwidth and the availability of low–cost compatible hardware and peripherals. The performance of an entry level RVP8 (currently dual 2.4 GHz Pentium processors) is 6 times faster than the fastest RVP7 ever produced (with two RVP7/AUX boards). Aside from the open hardware approach, the RVP8 has an open software approach as well. The RVP8 runs in the context of the Linux operating system. The code is structured and public API’s are provided so that research customers can modify/replace existing SIGMET algorithms, or write their own software from scratch using the RVP8 software structure as a foundation on which to build. The advantage of the open hardware and software PCI approach is reduced cost and the ability for customers to maintain, upgrade and expand the processor in the future by purchasing standard, low cost PC components from local sources. SoftPlane High–Speed I/O Interconnect There are potentially many different I/O signals emanating from the backpanel of the RVP8. Most of these conform to well-known electrical and protocol standards (VGA, SCSI, 10–BaseT, RS-232 Serial, PS/2 Keyboard, etc.), and can be driven by standard commercial boards that are available from multiple vendors. However, there are other interface signals such as triggers and clocks that require careful timing. These precise signals cannot tolerate the PCI bus latency. For signals that have medium–speed requirements (~1 microsec latency) for which the PCI bus is inappropriate; and others that require a high–speed (~ 1 ns latency) connection that can only be achieved with a dedicated wire, the RVP8 Softplane t provides the solution. Physically, the Softplanet is a 16-wire digital “daisy-chain” bus that plugs into the tops of the RVP8/Rx, RVP8/Tx, and I/O boards. The wires connect to the FPGA chips on each card, and the function of each wire is assigned at run–time based on the connectivity needs of the overall system. The Softplanet allocates a dedicated wire to carry each high-speed signal; but groups of medium-speed signals are multiplexed onto single wires in order to conserve resources. Even though there are only 16 wires available, the Softplane is able to carry several high-speed signals and hundreds of medium–speed signals, as long as the total bandwidth does not exceed about 600MBits/sec. The Softplanet I/O is configured at run–time based on a file description rather than custom wiring such as wirewrap. Neither the PCI backplane nor the physical Softplanet are customized in any way. Since there is no custom wiring, a failed board can be replaced with a generic off–the–shelf spare, and that spare will automatically resume whatever functions had been assigned to the original board. Similarly, if the chassis itself were to fail, then simply plugging the boards into another generic chassis would restore complete operation. Cards and chassis can be swapped between systems without needing to worry about custom wiring. Introduction and Specifications RVP8 User’s Manual March 2006 1–3 Standard LAN Interconnection for Data Transfer or Parallel Processing For communication with the outside world, the RVP8 supports as standard a 10/100/1000 Base T Ethernet. For most applications, the 100 BaseT Ethernet is used to transfer moment results (Z, T, V, W) to the applications host computer (e.g…

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Hardware Installation RVP8 User’s Manual September 2005 2–1 2.Hardware Installation 2.1Overview and Input Power Requirements This chapter describes how to install the RVP8 hardware. Topics include mechanical installation and siting, electrical specifications of the interface signals, system-level considerations and the standard connector panel that is provided. There are three major modules supplied with the RVP8. These are: IFD (IF Digitizer)Typically mounted in the radar receiver cabinet. Input Power 47–63 Hz 100–240 VAC Auto-ranging Main ChassisUsually mounted in 19” EIA rack. Input Power 60/50 Hz 115/230 VAC Manual Switches I/O-62 Connector Panel Usually mounted in 19” EIA rack within 2 m of Main Chassis Much of the RVP8 I/O is configured via software. This makes the unit very flexible. Also, since there is virtually no custom wiring, it is very easy to insert spare modules and circuit cards. The software configuration of the I/O is described in Appendix A. This section, in conjunction with Appendix B, describes the physical installation of the hardware. WARNING: The Main Chassis redundant power supplies are NOT auto-ranging like the IFD. These are factory configured for the expected voltage, but should be VERIFIED by the customer before power is applied to the system. Hardware Installation RVP8 User’s Manual September 2005 2–2 2.2IFD IF Digitizer Module Installation The IFD mains power is to be permanently “hard wired” in a NEMA electrical enclosure that is accessible only to a trained technician. The ground (earth) connection should be attached directly to the IFD case mounting screw then brought to the power supply ground connection. Disconnect the the mains power before opening the IFD for service. The IFD is best serviced by disconnecting the mains power, removing it from its mount and placing it on a bench. 2.2.1IFD Introduction The IFD IF digitizer is housed in an electrically sealed solid metal enclosure to achieve good immunity to external electrical noise. The internal circuitry has been designed to minimize the number of digital components, and it is carefully grounded and shielded to make the cleanest possible samples of the input IF signal. The unit is cooled by direct conduction of heat through the metal chassis; there are no openings required for airflow. The IFD replaces all of the IF receiver components that are found in a traditional analog receiver system, i.e., SBand Pass Filters SLOG Receiver SAFC Circuit SAGC or IAGC circuit SQuad Phase Detector SCOHO (on magnetron systems) SLine drivers for base band video Indeed, one of the most time consuming parts of an upgrade is often the removal of old components. Many customers choose to simply bypass them and leave them in place. In some cases there will be other receiver modifications required to match the IFD signal input specifications. For example, IF attenuators or an IF amplifier are sometimes required. If you are doing an upgrade of an older system, you might want to consider purchase of a new STALO which can make significant improvements in Doppler performance. You should carefully document and red-line your system schematics to reflect any changes to the receiver. Hardware Installation RVP8 User’s Manual September 2005 2–3 2.2.2IFD Revision History There have been several hardware revisions of the IFD module since its introduction initially with the RVP7. Table 2–1 summarizes the differences among all of the versions that have been manufactured so far. The remainder of this chapter covers only the 14-bit units, although the previous generation 12-bit units are compatible with the RVP8 as well. Table 2–1:Differences Among Versions of the IFD Rev.BRev.CRev.DRev.E & Higher A/D ChipAnalog Devices AD9042, 12–BitsAD6644, 14–BitsAD6645, 14–Bits Nominal IF Sample Rate 36MHz72MHz IF InputsSingle IF Input ChannelDual IF Inputs A/D Noise Density –76dBm/MHz–82dBm/MHz–85dBm/MHz Dynamic Range 86dB at 0.5MHz93dB at 0.5MHz96dB at 0.5MHz Link to RxCoax uplink, Fiber downlinkIntegrated CAT-5E UpgradabilityFPGA chips must be manually reprogrammedReFlashable via Rx-Link Input Signal Level A/D saturation at +4.5dBmA/D saturation at +6.0dBm Ext-ClockNoYes (shared with AFC connector) Noise Generator None. The A/D dither power must be supplied from wideband thermal noise in the RF/IF chain. Built-in noise source supplies A/D dither power in the 200–900KHz range. Power Supplies+5.17V, +12V, –12V +5.23V Primarily. + 12/15V required only for analog AFC output +5.33V Primarily. +12/15V required for AFC, Hi-DAFC or stable VCXO (recommended). –12/15V required only for analog AFC output. Jumpers (Table 2–7) NoneAFC/Clock I/O AFC/Clock I/O, Dither and Config Selections AFC/Clock I/O, JTAG, DAFC/Clock and Config Selections Uplink Protocols AFC-16 AFC-16 & PLL-16 Supports full set of protocols defined in Section 2.5.1 First Production March 1997April 1998December 2000August 2004 Hardware Installation RVP8 User’s Manual September 2005 2–4 2.2.3IFD Power, Size and Mounting Considerations The IFD is a compact sealed module with dimensions 23.6 x 10.9 x 3.0 cm. (9.3 x 4.3 x 1.2 in). The unit is designed to be mounted on edge such that the 23.6 x 3.0 cm. surface is flush on the back of the receiver cabinet with 10.9 cm. protrusion into the cabinet. The unit is typically placed where a traditional LOG receiver would be installed. The IFD is cooled by direct conduction through its metal enclosure. It should be positioned so that air can freely convect around it, or bolted to a larger surface that will conduct the heat away. The power supply module is separate and can be mounted nearby in the radar cabinet, or it can be attached directly to the IFD using a special mounting bracket. The power supply and bracket will add 3.3 cm. (1.3 in) of overall width to the receiver module. The power supply is a low noise, low ripple, switching unit; the input voltage range is 100–240 VAC 47–63 Hz, autoranging. The IFD has an internal 3-stage power supply input filte…

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Plot–Assisted Setups RVP8 User’s Manual October 2004 4–1 4. Plot-Assisted Setups The IFD receiver module replaces virtually all of the IF components in a traditional analog receiver. The alignment procedures for those analog components are usually very tedious, and require continued maintenance even after they are first performed. Subtle drifts in component specifications often go unnoticed until they become so severe that the radar’s data are compromised. The RVP8 makes a big improvement over this by providing an interactive graphical alignment procedure for burst pulse detection, Tx/Rx phase locking, and calibration of the AFC feedback loop. You may view the actual samples of the burst pulse and receiver waveform, examine their frequency content, design an appropriate matched filter, and observe live operation of the AFC. It is a simple matter to check the spectral purity of the transmitter on a regular basis, and to discover the presence of any unwanted noise or harmonics. Moreover, the RVP8 is able to track and modify the initial settings so that proper operation is maintained even with changes in temperature and aging of the microwave components. The Plot-Assisted Setups are accessed using the various “P” commands within the normal TTY setup interface. These commands are described later in this chapter. The RVP8 supports opcodes that allow the host computer to monitor the data being plotted. The dspx utility can display these plots directly on the workstation screen, and thus, can carry out the graphical checkup and alignment procedures remotely via a network. Plot–Assisted Setups RVP8 User’s Manual October 2004 4–2 4.1 P+ — Plot Test Pattern The RVP8 can produce a simple test pattern to verify that the display software is working properly. From the TTY monitor enter the “P+” command. This will print the message “Plotting Test Pattern...” on the TTY and then produce the plot shown in Figure 4–1. This display is actually an overlay of six different strokes: 1) bottom line, 2) middle line, 3) top line, 4) line sloping up, 5) line sloping down, and 6) the sine wave pattern. The later changes phase with each plot so that, with a little imagination, it appears to be radiating from the left side of the display. Figure 4–1: The Test Pattern Display When you are satisfied that the plot is being drawn correctly, type “Q” or hit ESC to return to the TTY monitor. Plot–Assisted Setups RVP8 User’s Manual October 2004 4–3 4.2 General Conventions Within the Plot Commands The “Pb”, “Ps”, and “Pr” commands all have a similar structure to their TTY user interface. Each command begins by printing a list of subcommands that are valid in that context. These subcommands are single keystrokes that are executed immediately by the RVP8 as they are typed. The “ENTER” key is not required. The available subcommands are different for each plot command; but, as much as possible, each key has a similar meaning across all commands. The working and measured parameters for each plot command are printed on the TTY as two lines of information following the subcommand list. The first line contains settings that only change when a subcommand is issued; but the second line is live and reflects the current status of the burst input, the IF input, or the AFC output. The first line is printed just once, but the second line is continually overprinted on top of itself. This makes it appear as a live status line whose values always remain up to date. The ”Pb”, ”Ps”, and ”Pr” commands will report ”No Trigger” on the TTY status line whenever the external trigger is expected but missing. The TTY screen will scroll upward each time a new subcommand is executed, so that a history of information lines and command activity can be seen on the screen. You may also use the Carriage-Return key to scroll the display up at any time. If the initial list of subcommands disappears off the top, you may type “?” to force a reprint. To exit the plot command entirely and return to the TTY main menu type “Q” or ESC. These basic “help” and “exit” keystrokes apply everywhere within the RVP8 setup menus. To save space and minimize clutter on the TTY screen, they are not shown in the itemized list of subcommands. Most commands have a lowercase and an uppercase version. If a lowercase command does something, then its uppercase version does the same thing but even more so (or in reverse). For example, if the “w” subcommand widens something by a little bit, then “W” would widen it a lot. This simple convention reduces the number of different subcommand keys that are needed, and makes the interface easier to memorize. The graphical display and TTY status lines are continually updated with fresh data several times per second. Occasionally it is useful to freeze a plot so that it can be studied in more detail, or compared with earlier versions. To accomplish this, every plotting command supports a “Single Step” mode that is accessed by typing the “.” (period) key. This key causes the display and TTY status lines to freeze in their present state, and the message “Paused...” will be printed. Subsequently, typing another “.” will single step to the next data update, but the plot and printout will still remain frozen. Typing “Q” or ESC will exit the plot command entirely (as they normally do). All other keys return the plot command to its normal live updating, but the key is otherwise discarded (i.e., subcommand keys are not executed while exiting from single step mode). All of the plot commands support subcommands whose only purpose is to alter the appearance of the display, e.g., zoom, stretch, etc. These subcommands make no changes to the actual working RVP8 calibrations. However, the display settings are stored in nonvolatile RAM just like all of the other setup parameters. This means that all previous display settings will be restored whenever you restart each plot command. This is very convenient when alternating among the various plots. Plot–Assisted Set…

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Processing Algorithms RVP8 User’s Manual March 2006 5–1 5.Processing Algorithms Note: Optional dual polarization processing algorithms are described in Appendix B. This chapter describes the processing algorithms implemented within the RVP8 signal processor. The discussion is confined to the mathematical description of these algorithms. Figure 5–1 shows the overall process by which the RVP8 converts the IF signal into corrected reflectivity, velocity, and width. Table 5–1 summarizes the quantities that are measured and computed by the RVP8. The type of the quantity (i.e., real or complex) is also given. Subscripts are sometimes used to denote successive samples in time from a given range bin. For example, s n denotes the “I” and “Q” time series or “video” sample from the n’th pulse from a given range bin. In cases where it is obvious, the subscripts denoting the pulse (time) are dropped. The descriptions of all the data processing algorithms are phrased in terms of the operations performed on data from a single range bin- identical processing then being applied to all of the selected ranges. Thus, there is no need to include …

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