VO8OD1BLUETOOTH HEADSET (CLASS 2)

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FRONT VIEW OF SAMPLE BOTTOM VIEW OF EUT LEFT VIEW OF SAMPLE RIGHT VIEW OF SAMPLE TOP VIEW OF SAMPLE BOTTOM VIEW OF SAMPLE

FCC ID Label Location FCC ID: VO8OD1

FCC ID Label FCC ID: VO8OD1

INTERNAL VIEW OF SAMPLE – 1 INTERNAL VIEW OF SAMPLE – 2

Preliminary Datasheet Released date: 02/20/2008 © 2000~2008 Integrated Systems Solution Corporation Revision1.0 Page 10 創傑科技股份有限公司 Integrated System Solution Corp. www.issc.com.tw Bluetooth Single Chip v2.0 w/ EDR IS1610N 5 Functional Description 5.1 Overall Architecture The ISSC IS1610N integrates an enhanced EDR Bluetooth RF & BB core, HCI controller, Audio controller and an ENHANCED 8051 processor with an internal mask ROM for program memory and SRAM for data memory. An innovative interconnection structure called the Common-Memory Architecture (CMA) is designed to provide a fast and flexible data movement scheme between the embedded processor, Bluetooth core, and peripheral hardware within this SRAM data memory space. For audio and power management, IS1610N provide embedded audio code and some power management to reduce the external components. Figure 1 – Block diagram for IS1610N Common SRAM (24KB) EDR Modem A- law/u- law /CVSD encoder/ decoder RF FSM controller & Registers Embedded Processor - ROM HCI Control logic Common Memory CPU Interface & Interrupt controller Memory mapped Register Bank Misc. Logic Clock Timer Hopping Sequence Controller Task Controller UART GPIO Voice Codec PLL 1.8V LDO . SAR ADC EDR RF Preliminary Datasheet Released date: 02/20/2008 © 2000~2008 Integrated Systems Solution Corporation Revision1.0 Page 11 創傑科技股份有限公司 Integrated System Solution Corp. www.issc.com.tw Bluetooth Single Chip v2.0 w/ EDR IS1610N 5.2 Radio Frequency (RF) 5.2.1 Transmitter The internal PA has a maximum output power of +4dBm with level control 8dB from amplitude control. This is applied into Class2/3 radios without external RF PA. If you want a larger output power for Class1 application, the external PA can be used. The transmitter features IQ direct conversion to minimize the frequency drift. And it can excess 30dB power range with temperature compensation machine. 5.2.2 Receiver The LNA can be operated into two type modes. One type is TR-combined mode for single port application. The other type is TR-separated mode for dual port application that used an external PA/LNA application. The image rejection filter is to reject image frequency for low-IF architecture. This filter for low-IF architecture is implied to reduce external BPF component for super heterodyne architecture. The ADC is utilized to sample input analogue wave to convert into digital for de- modulator analysis. Before the ADC, a channel filter has been integrated into receiver channel that can reduce the external component count and increase the anti-interference capacity. For avoiding temperature variation issues, a temperature sensor with temperature calibration is utilized into bias current and gain control of LNA, Mixers, and RF AMP. 5.2.3 Synthesizer The internal loop filter is used to reduce external RC components. This can reduce cost and variations for components. This internal LC tank for VCO is utilized to reduce variation for components. The cost is down at the same time. A fully integrated synthesizer has been created. There requires no external VCO, varactor diode, resonator and loop filter. Preliminary Datasheet Released date: 02/20/2008 © 2000~2008 Integrated Systems Solution Corporation Revision1.0 Page 12 創傑科技股份有限公司 Integrated System Solution Corp. www.issc.com.tw Bluetooth Single Chip v2.0 w/ EDR IS1610N 5.3 SAR ADC Voltage Converter The 10-bit Successive-Approximation analog to digital converter (SAR ADC) features 1 dedicated channel for battery power detection and 1 channel for external peripheral temperature sensing. This ADC has 10 bits resolution that provides a high accurate monitoring for battery voltage. The operating current is very low and almost consumes no power when disabled. Preliminary Datasheet Released date: 02/20/2008 © 2000~2008 Integrated Systems Solution Corporation Revision1.0 Page 13 創傑科技股份有限公司 Integrated System Solution Corp. www.issc.com.tw Bluetooth Single Chip v2.0 w/ EDR IS1610N 5.4 MODEM There are three different modulations for Bluetooth v2.0 w/ EDR. In figure 2, we summarized these modulations and data rate. Figure 2 – Modulation type for Bluetooth v2.0 w/ EDR Data Rate Modulation Bits/Symbol BDR: 1 Mbps GFSK 1 EDR: 2 Mbps π/4 DQPSK 2 EDR: 3 Mbps 8DPSK 3 5.4.1 Basic Data Rate MODEM (BDR) On the Bluetooth v1.2 specification and below, 1 Mbps was the standard data rate based on Gaussian Frequency Shift Keying (GFSK) modulation scheme. This basic rate modem meets BDR requirements of Bluetooth v2.0+EDR specification. Figure 3 – Data format for BDR Access Code Header Payload 5.4.2 Enhanced Data Rate MODEM (EDR) On the Bluetooth v2.0+EDR specification, Enhanced Data Rate (EDR) has been introduced to provide 2 and 3 Mbps data rates as well as 1 Mbps. This enhanced data rate modem meets EDR requirements of Bluetooth v2.0+EDR specification. For the viewpoint of baseband, both BDR and EDR utilize the same 1MHz symbol rate and 1.6 KHz slot rate. For BDR, 1 symbol represents 1 bit. However each symbol in the payload part of EDR packets represents 2 or 3 bits. This is achieved by using two different modulations, π/4 DQPSK and 8DPSK. Preliminary Datasheet Released date: 02/20/2008 © 2000~2008 Integrated Systems Solution Corporation Revision1.0 Page 14 創傑科技股份有限公司 Integrated System Solution Corp. www.issc.com.tw Bluetooth Single Chip v2.0 w/ EDR IS1610N Figure 4 –Data format for EDR Access Code Header GuardSyncPayload Trailer For this modulation, each symbol carries 2 bits of information. For its constellation diagram, although there are 8 possible phase states, the encoding scheme guarantees the trajectory of the modulation between symbols is restricted to 4 states. For a given starting point, every phase change between symbols is restricted to +45°, +135°, -45°, and -135°. Figure 5 –Phase shift & bit pattern for 2 MHz data rate Phase Shift Bit Pattern +45° (+π/4) 00 +135° (+3π/4) 01 -135°(-3π/4) 11 -45°(-π/4) 10 For this modulation, each symbol carries 3 bits of information. For its cons…

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No. Name Specification Qt y. Posizition of Component Memo 1 PCB Board OD1-22 1 1.1 Chip Capacitor 1uF±20% 6.3V 8 C2、C13、C14、C19、C25、C26、C29、 C30 0402 1.2 Chip Capacitor 0.01uF±20% 16V 1 C24 0402 1.3 Chip Capacitor 0.1uF±20% 16V 2 C11、C16 0402 1.4 Chip Capacitor 10uF±20% 16V 1 C23 0805 1.5 Chip Capacitor 1uF±20% 10V 4 C3、C17、C18、C22 0603 1.6 Chip Capacitor 4.7uF±20% 10V 3 C1、C4、C28 0603 1.7 Chip Capacitor 15pF±5% 50V 2 C12、C15 0402 1.8 Chip Capacitor 10pF±5% 50V 1 C27 0402 1.9 Chip Capacitor 330nF±20% 50V 2 C20、C21 0402 1.10 Chip Capacitor 5pF±5% 16V 1 C9 0402 1.11 Chip Inductance 3.9nH±5% S 1 C6 0402 1.12 Chip Capacitor 1.5pF±5% 50V 1 C10 0402 1.13 Chip Resistance 220K±5% 1 R23 0402 1.14 Chip Resistance 2M±5% 1 R29 0402 1．15 Chip Resistance 4.7K±5% 2 R11、R30 0402 1.16 Chip Resistance 47K±5% 1 R10 0402 1.17 Chip Resistance 3.3K±5% 3 R6、R7、R12 0402 1.18 Chip Resistance 1.5R±5% 1 R25 0402 1.19 Chip Resistance 33K±5% 1 R24 0402 1．20 Chip Resistance 2.4K±5% 2 R2、R13 0402 1.21 Chip Resistance 1K±5% 7 R1、R4、R14、R15、R16、R17、R26 0402 1.22 Chip Resistance 15KΩ±5% 2 R3、R28 0402 1.23 Chip Resistance 20K±5% 1 R27 0402 1.24 Chip Resistance 10K±5% 2 R5、R19 0402 1.25 Chip Resistance 330Ω±5% 2 R8、R9 0402 1.26 Chip Inductance 2.2nH±5% S 1 L1 0402 1.27 Inductance 10uH 1 L6 0805 1.28 ChipDynatron MMBT3904 1 Q1 SOT23 1.29 tupe AF2301P 1 Q2 SOT23 1.30 IC EUP8054 1 U1 SOT23-5 1.31 IC XC6204B282MR 1 U2 SOT23-5 1.32 IC AT1308 1 U5 SOT23-5 1.33 IC IS1610N-022 1 U3 QFN56 1.34 EEPROM AT24C08 1 U4 TSSOP-8 1.35 Touch Switch 3.8×6×2.5(同H219)1 SW1 上按键 1.36 Touch Switch 小乌龟 2 SW2、SW3 侧按键 0 0 版本号 修改状态 数 量 更改单号 签 名 日 期 修改标记 数量 更改单号 签 名日 期 拟 制 审 核 LH053WL 等级 标记 第 1 张 共 2 张 批 准 OD1-22 蓝牙耳机 物 料 清 单 No. Name Specification Qt y. Posizition of Component Memo 1.37 Chip luminotron Red 1 D3 0603 1.38 Chip luminotron Blue 1 D4 0603 1.39 Chip Diode CDSH3-222N 1 D1 SOT-523 1.40 Chip Diode CDSU400B 2 D2、D5 0603 1.41 Chip Diode CDBU0240 1 D6 0603 1.42 Chip Oscillate 16MHz±10PPM 12PF 1 X1 5032 1.43 Chip Antenna SLDA52-2R540GHZ-S1 1 ANT1 5020 1.44 OLED H910 1 LCM1 1.45 Mini 8 Pin mini 8pin 1 CON1 1.46 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 LH053WL 0 0 等 级 标 记 第 2 张 共 2 张 版本号 修改状态 数 量 更改单号 签 名日 期

RF EXPOSURE EVALUATION - FCC ID: VO8OD1 Limit According to §1.1307(b)(1), systems operating under the provisions of this section shall be operated in a manner that ensures that the public is not exposed to radio frequency energy level in excess of the Commission’s guidelines. According to §1.1310 and §2.1091 RF exposure is calculated. Limits for Maximum Permissible Exposure (MPE) Frequency Range (MHz) Electric Field Strength (V/m) Magnetic Field Strength (A/m) Power Density (mW/cm 2 ) Averaging Time (Minute) Limits for Occupational / Controlled Exposure 0.3 – 3.0 614 1.63 (100)* 6 3.0 – 30 1842/f 4.89/f (900/f)* 6 30 – 300 61.4 0.163 1.0 6 300 – 1500 / / f/300 6 1500 – 100 000 / / 5 6 Frequency Range (MHz) Electric Field Strength (V/m) Magnetic Field Strength (A/m) Power Density (mW/cm 2 ) Averaging Time (Minute) Limits for General population / Uncontrolled Exposure 0.3 – 3.0 614 1.63 (100)* 30 3.0 – 30 842/f 2.19/f (180/f)* 30 30 – 300 27.5 0.073 0.2 30 300 – 1500 / / f/1500 30 1500 – 100 000 / / 1.0 30 F = Frequency in MHz * = Plane-wave equivalent power density Test Data Predication of MPE limit at a given distance Equation from page 18 of OET Bulletin 65, Edition 97-01 S=PG/4πR² Where: S=power density P=power input to antenna G=power gain of the antenna in the direction of interest relative to an isotropic radiator R=distance to the center of radiation of the antenna Maximum peak output power: -8.26(dBm) Maximum peak output power: 0.149(mW) Prediction distance: 1 (cm) Predication frequency: 2.480(GHz) Duty Cycle: 0.332 Power density at predication frequency at 1 cm: 0.036 (mW/cm²) MPE limit for controlled exposure at prediction frequency: 5.0 (mW/cm²) MPE limit for uncontrolled exposure at prediction frequency: 1.0 (mW/cm²) Test Result: Pass

123456 A B C D 654321 D C B A Title NumberRevisionSize Orcad C Date:25-Mar-2007Sheet of File:F:\蓝牙模块生产资料\od1\OD1-22-LDO.ddbDrawn By: CHG_state DC_in DC_in P2_0 PWR_en P W R _ e n CHG_state 1 2 R4 1K C11 0.1uF 12 R8 330R 12 D3 R 12 D4 B 1 ANT1 1 2 R2 2K4 C1515pF 12 R16 1K C131uF 12 R9 330R SW1 Switch 1 2 R7 3K3 12 R1 1K 12 R14 1K 1 2 R5 10K C3 1uF C22 1uF 1 2 R11 4K7 1 2 L1 2.2nH 3 21 Q1 MMBT3904 C2 1uF 12 R15 1K C16 0.1uF 3 2 1 D1 CDSH3-222 1 2 R13 2K4 C1 4.7uF C141uF C10 1.5pF C2310uF 12 R12 3K3 C17 1uF IS1610N QFN56 VOLup 1 PWRen 2 VDD_IO 3 MFB 4 VOLdown 5 GND 6 HCI_RXD 7 HCI_TXD 8 NC 9 SCL 10 SDA 11 VDD_core 12 NC 13 BAT_in 14 A V D D _ S A R 1 5 A V D D _ A D C 1 6 A G N D _ A D C 1 7 L i n e _ i n + 1 8 L i n e _ i n - 1 9 B G _ R 2 0 B G _ R E F 2 1 L i n e _ o u t + 2 2 L i n e _ o u t - 2 3 A G N D _ D A C 2 4 A V D D _ D A C 2 5 L D O _ o u t 2 6 L D O _ e n 2 7 L D O _ i n 2 8 SCO 29 VDD_core 30 TEST 31 PWM 32 GND 33 VDD_IO 34 PWR 35 DC_in 36 EAN 37 VCC_dig 38 DIG18 39 XO_P 40 XO_N 41 PLL_18 42 V C C _ R F 4 3 R F _ T P 4 4 R F _ T P 4 5 R X 4 6 R T X 4 7 N C 4 8 N C 4 9 N C 5 0 N C 5 1 N C 5 2 N C 5 3 L E D 1 5 4 L E D 0 5 5 C H G s t a t e 5 6 G N D 5 7 U3 IS1610N 12 D2 CDSU400B C9 5pF VIN 1 EN 3 BP 4 VOUT 5 GND 2 U2 XC6204B282MR A0 1 A1 2 A2 3 GND 4 SDA 5 SCL 6 WP 7 VCC 8 U4 AT24C08 12 R17 1K C5 NC 1 2 R3 15K CHRG 1 GND 2 BAT 3 VCC 4 PROG 5 U1 EUP8054 C18 1uF C8 NC C20 330nF C19 1uF 41 32 X1 16MHZ 12 R10 47K C7 NC C4 4.7uF C1215pF 12 C6 3.9nH 1 2 R6 3K3 C21 330nF 1V8 2V7 1V8 1V8 2V7 1V8 1V8 2V7 2V7 2V7 2V7 VBAT 5V 2V7 VBAT 2V7 2V7 5V VBAT 2V7 MIC SPK EEPROM BATTERY BAT+ BAT- HCI 2V7 R25 1.5R 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 CON1 TP12 TP11 TP1 TP2 TP3 TP4 TP5 TP6 TP7 TP8 TP9TP10 TP13 R19 10K 2 3 1 Q2 AF2301P R27 20K R26 1K D5 CDSU400B H910-20 S D A S C L C29 1uF C28 4.7uF C26 1uF 12 D6 CDBU0240 1 2 R23 220K LX 1 FB 3 EN 4 GND 2 VIN 5 U5 AT1308 C25 1uF 1 2 R24 33K C27 10pF 1 2 R 2 9 2 M 12 L6 10uH N C 1 V S S 2 T E S T 5 3 T E S T 4 4 T E S T 3 5 T E S T 2 6 T E S T 1 7 N C 8 N C 9 N C 1 0 V D D 1 1 B S 1 1 2 B S 2 1 3 N C 1 4 I R E F 2 8 D 7 2 7 D 6 2 6 D 5 2 5 D 4 2 4 D 3 2 3 D 2 2 2 D 1 2 1 D 0 2 0 E D # 1 9 W R # 1 8 D / C # 1 7 R E S # 1 6 C S # 1 5 N C 3 1 V C C 3 0 V C O M H 2 9 LCM1 P13701 12 R28 15K C 2 4 0 . 0 1 u 2V7 2V7 2V7 RITDISPLAY IND0805 SW2 VOLup SW3 VOLdown SDA SCL R30 4.7K 2V7 C30 1uF PDF 文件使用 "pdfFactory Pro" 试用版本创建 www.fineprint.cn

FCC Part 15 TEST REPORT For Bluetooth Headset (Class 2) Model Name: OD1 FCC ID: VO8OD1 Report No.: GZAGC132080303E6 Date of Issue: Mar.27, 2008 Prepared For GuangZhou LIWEI Electronics Co., Ltd. No.33, Zhenzhongbei Road, Shenshan Industrial Park, Baiyun District, Guangzhou 510460, P.R. China Tel: 86-020 8606 2626 Fax: 86-020 8606 2626 Prepared By Shenzhen Attestation of Global Compliance Science & Technology Co., Ltd. Suite B11/B12, 4F, Huafeng Mall, Chuangye 2 nd Road, 25 District, Bao’an, Shenzhen Tel: 86-755-29742358 Fax: 86-755-26008484 Report No.:GZAGC132080303E6 Page 1 of 39 VERIFICATION OF COMPLIANCE Applicant: GuangZhou LIWEI Electronics Co., Ltd. Manufacturer GuangZhou LIWEI Electronics Co., Ltd. Product Description: Bluetooth Headset (Class 2) Brand Name: Bluedio Model Number: OD1 FCC ID VO8OD1 Report Number: GZAGC132080303E6 Date of Test: Mar.25, 2008-Mar.28, 2008 WE HEREBY CERTIFY THAT: The above equipment was tested by Shenzhen Attestation of Global Compliance Science & Technology Co., Ltd. The test data, data evaluation, test procedures, and equipment configurations shown in this report were made in accordance with the procedures given in ANSI C63.4 (2003) and the energy emitted by the sample EUT tested as described in this report is in compliance with radiated emission limits of FCC Rules Part 15.247. Tested By: Tony Tian Mar.29, 2008 Checked By: Randy He Mar.29, 2008 Authorized By King Zhang Mar.29, 2008 Report No.:GZAGC132080303E6 Page 2 of 39 TABLE OF CONTENTS 1. GENERAL INFORMATION ...................................................................................................................... 4 1.1 PRODUCT DESCRIPTION............................................................................................................ 4 1.2 RELATED SUBMITTAL(S) / GRANT (S) ....................................................................................... 4 1.3 TEST METHODOLOGY ................................................................................................................ 4 1.4 TEST FACILITY ............................................................................................................................. 4 1.5 SPECIAL ACCESSORIES............................................................................................................. 4 1.6 EQUIPMENT MODIFICATIONS ....................................................................................................4 2. SYSTEM TEST CONFIGURATION ......................................................................................................... 5 2.1 CONFIGURATION OF TESTED SYSTEM .................................................................................... 5 2.2 EQUIPMENT USED IN TESTED SYSTEM ................................................................................... 5 3. SUMMARY OF TEST RESULTS ............................................................................................................. 6 4. DESCRIPTION OF TEST MODES........................................................................................................... 6 5. CONDUCTION EMISSIONS .................................................................................................................... 7 5.1 MEASUREMENT PROCEDURE: .................................................................................................. 7 5.2 TEST SET-UP (BLOCK DIAGRAM OF CONFIGURATION) ......................................................... 7 5.3 MEASUREMENT EQUIPMENT USED:......................................................................................... 7 5.4 LIMITS AND MEASUREMENT RESULT:...................................................................................... 8 6. MAXIMUM OUTPUT POWER.................................................................................................................. 9 6.1 MEASUREMENT PROCEDURE: .................................................................................................. 9 6.2 TEST SET-UP (BLOCK DIAGRAM OF CONFIGURATION) ......................................................... 9 6.3 MEASUREMENT EQUIPMENT USED:....................................................................................... 11 6.4 LIMITS AND MEASUREMENT RESULT:.................................................................................... 12 7. 20 DB BANDWIDTH .............................................................................................................................. 14 7.1 MEASUREMENT PROCEDURE .................................................................................................14 7.2 TEST SET-UP (BLOCK DIAGRAM OF CONFIGURATION) .......................................................14 7.3 MEASUREMENT EQUIPMENT USED:....................................................................................... 14 7.4 LIMITS AND MEASUREMENT RESULTS: ................................................................................. 14 8. MAXIMUM CONDUCTED OUTPUT POWER SPECTRAL DENSITY ................................................... 16 8.1 MEASUREMENT PROCEDURE: ................................................................................................ 16 8.2 TEST SET-UP (BLOCK DIAGRAM OF CONFIGURATION) .......................................................16 8.3 MEASUREMENT EQUIPMENT USED:....................................................................................... 16 8.4 LIMITS AND MEASUREMENT RESULT:.................................................................................... 16 9. OUT OF BAND EMISSION .................................................................................................................... 19 9.1 MEASUREMENT PROCEDURE: ................................................................................................ 19 9.2 TEST SET-UP (BLOCK DIAGRAM OF CONFIGURATION) .......................................................19 9.3 MEASUREMENT EQUIPMENT USED:......................…

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RADIATED EMISSION TEST SETUP - TRANSMITTING RADIATED EMISSION TEST SETUP – CHARGING CONDUCTED EMISSION TEST – CHARGING