PLVSDT201UB-ARK6125 Watt Multimode SDR Transmitter

Screen Service Broadcasting Technologies SpA

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Application Details

Equipment Class: TBC - Licensed Broadcast Station Transmitter
Date of Grant: Jun 04, 2012
Application Purpose: Original Equipment
Date of Application: Mar 25, 2012
Equipment Note: 125 Watt Multimode SDR Transmitter
Frequency Range: 614.00000000 - 698.00000000
Company: Screen Service Broadcasting Technologies SpA
Country: Italy

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Document Text

Text extracted from the exhibit documents filed with the FCC. Open a document above to read the original.

Users Manual

ISO 9001:2000 Cert. N°4500/1 Document name: SDT_ARK6_User_Manual_ENG_vATSC Document code: ARK6-UM-000 Author: C. Di Biase Date: September 23rd, 2011 Version: 1.1 Software User Manual ARK6 External Document ISO 9001:2000 Cert. N°4500/1 Version 1.1 SDT_ARK6_User_Manual_ENG_vATSC Page 2 of 206 Table of Contents 1 Document structure ............................................................................................................... 5 2 Scope of the document .......................................................................................................... 6 3 Introduction ........................................................................................................................... 7 3.1 Digitizer features .............................................................................................................. 9 3.2 Satellite receivers features ............................................................................................... 9 3.2.1 DVB-S/S2 .................................................................................................................. 9 3.2.2 DVB-S/S2 plus CAM ............................................................................................... 10 3.3 Terrestrial receivers features ......................................................................................... 11 3.3.1 ATSC ....................................................................................................................... 11 3.4 ITU Transmitter features ................................................................................................ 12 3.4.1 ITU Features........................................................................................................... 12 3.4.2 ITU Signal Processing ............................................................................................. 13 3.5 ATSC Transmitter features ............................................................................................. 14 3.5.1 ATSC Features ........................................................................................................ 14 3.5.2 ATSC Signal Processing .......................................................................................... 14 3.6 System Features ............................................................................................................. 15 3.7 Synchronization .............................................................................................................. 15 4 Specifications ....................................................................................................................... 16 4.1 Input Interfaces .............................................................................................................. 16 4.2 Output Interfaces ........................................................................................................... 19 4.3 Control Interfaces ........................................................................................................... 22 4.3.1 RS232 pinout ......................................................................................................... 23 4.3.2 TLC pinout .............................................................................................................. 23 4.3.3 TLS pinout .............................................................................................................. 24 4.4 Power Supply .................................................................................................................. 25 4.5 Environmental Specification .......................................................................................... 27 4.6 Mechanical Specification................................................................................................ 27 5 Java Graphic User Interface ................................................................................................. 28 5.1 Authentication Option ................................................................................................... 28 5.2 Java Menu Bar ................................................................................................................ 29 5.3 Home Page ..................................................................................................................... 31 5.4 Input ............................................................................................................................... 32 5.5 Front-End ........................................................................................................................ 37 5.5.1 Tuner window: RF power level monitor ................................................................ 38 ISO 9001:2000 Cert. N°4500/1 Version 1.1 SDT_ARK6_User_Manual_ENG_vATSC Page 3 of 206 5.5.2 DIGITIZER FE Type .................................................................................................. 39 5.5.3 ATSC FE Type ......................................................................................................... 41 5.6 ATSC ............................................................................................................................... 44 5.6.1 ATSC Settings ......................................................................................................... 45 5.6.2 ATSC Modulation ................................................................................................... 49 5.6.3 ATSC TVCT .............................................................................................................. 51 5.6.4 ATSC Measure ........................................................................................................ 52 5.7 ITU.470 ........................................................................................................................... 54 5.7.1 ITU Settings ................................................................................…

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Block Diagram

SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA 1 FUNCTIONAL BLOCK DIAGRAM Screen Service Functional Block Diagram Purpose July, 2009 v 1.0 Page 1 - 2 1.1 FUNCTIONAL BLOCK DIAGRAM BOARD MODE SELECTOR RF IN DOWNCONVERTER IF IN 36 MHz ALARM PROCESSOR EVENT PROCESSOR RELAYS MANAGEMENT SNMP TRAP PROCESSOR GbE MANAGEMENT RELAYS AM/PM PRECORRECTION RF Output AMPLIFIER AMPL PWR OFF UPCONVERTER CHANNEL RF 1 PPS external 10 MHz external GPS input GPS Rx CLOCK SELECTION 10 M & 1 PPS GPS 10 M & 1 PPS ATSC Modulator ITU470 Modulator SDI Input 1 SDI Input 2 ATSC MODE ALARMS UPCONVERTER ALARMS CLOCK ALARMS AMPLI/POWER ALARMS SYSTEM ALARMS DOWNCONVERTER ALARMS ALARMS DETECTION Board mode Management OPTO RS 232 LOCAL INTERFACE COMMANDS MAILBOX SNMP SERVER JAVA SERVER OPTO INPUT MANAGEMENT STAND-BY STAND-BY Processor STD-BY command NETWORK MANAGEMENT COMMANDS PROCESSOR SNMP SERVER JAVA SERVER MANAGEMENT COMMANDS RESET COMMANDS OPTO command EVENTS Monitoring IF OUT GPS unlocked alarm 10MHz unlocked alarm GPS communication error alarm 129 MHz unlocked alarm 960 MHz unlocked alarm Down-conv. oscillator unlock alarm Rf input Squelch alarm File system error alarm Bad file in file system alarm No TS Input Up-conv. oscillator unlocked alarm Up-conv commmunication error alarm PSU voltage out of range alarm PSU current out of range alarm High case temperature alarm Absolute power limiter alarm Case temperature warning Case temperature alarm High forward power alarm Low forward power warning Low forward power alarm High reflected power alarm FAN speed alarm AMPLI POWER ALARMS UPCONVERTER ALARMS ATSC MODE ALARMS SYSTEM ALARMS DOWNCONVERTER ALARMS CLOCK ALARMS Warm UP Alarm FPGA Boot Alarm RX ATSC ALARMS ASI output ASI/SSI Input 1 GBe Input ASI/SSI Input 2 ASI/SSI Input 3 ASI/SSI Input 4 ADAPTIVE FILTER I/Q base band IF to AM/PM PRECORRECTION No SDI Input ITU 470 MODE ALARMS Wrong input standard

Block Diagram

SDT 201 UB ARK 6_ATSC_FCC SW BLOCK DIAGRAM V 1.0 Page 1 - 1 SDT 201 UB ARK 6 FCC Software Block Diagram SDT 201 UB ARK 6_ATSC_FCC SW BLOCK DIAGRAM V 1.0 Page 1 - 2 CONTENTS 1.1 INTRODUCTION .................................................................................................................................... 3 1.2 BLOCK DIAGRAM .................................................................................................................................. 3 1.3 BLOCK DESCRIPTION .......................................................................................................................... 4 SDT 201 UB ARK 6_ATSC_FCC SW BLOCK DIAGRAM V 1.0 Page 1 - 3 1.1 INTRODUCTION This note describes the high level software architecture. For each block only few sentence will be given. More detailed description will be provided if required 1.2 BLOCK DIAGRAM FILE SYSTEM MANAGEMENT EXTERNAL UART MANAGEMENT COMMUNICATION MANAGEMENT TLC MANAGEMENT TLS MANAGEMENT TCP MANAGEMENT SNMP MANAGEMENT DISPLAY MANAGEMENT MAIN PROGRAM SDT 201 UB ARK 6_ATSC_FCC SW BLOCK DIAGRAM V 1.0 Page 1 - 4 1.3 BLOCK DESCRIPTION 1 MAIN PROGRAM Initialize the System at the Switch On By the operative system it manages the tasks hereunder described. The tasks run all in parallel mode: a) FILE SYSTEM MANAGEMENT o Management of the configuration files o Any save transmitter action creates a file to be saved o Any reload transmitter action o Any parameters modification transmitter action b) EXTERNAL UART MANAGEMENT o By a proprietary protocol it manages, via serial line (232 level), all the W/R equipment registers c) COMMUNICATION MANAGEMENT o Communication management between microprocessor and the function forming the equipment: o Up converter o Down converter o Modulator d) TLC MANAGEMENT o It manages by the opto (four) the whole equipment o RF on/off o Remote standby o Change mode o Alarm reset e) TLS MANAGEMENT o It manages by the relais (four) the whole equipment o RF on/off (or selected alarm) o Mode selcted (or selected alarm) o Alarm defined by web interface mask (two relais) f) TCP MANAGEMENT o Communication management between microprocessor and web interface: o Micro answer to java request g) SNMP MANAGEMENT o It manages by snmp protocol the following standard SNMP operations o Get operation o Get next operation o Walk operation o Set operation o Trap h) DISPLAY MANAGEMENT o By a communication protocol between main micro and display micro it manages the following operations: o Menu Navigation o Data Settings o Data Refresh

External Photos

1 SDT 201 UB ARK 6_PICTURE CONTENTS 1.1 PURPOSE .............................................................................................................................................. 3 1.2 COMPOSITION ...................................................................................................................................... 3 1. AGILE DOWN CONVERTER _NOT EQUIPPED .................................................................................. 3 2. DIGITAL CORE ..................................................................................................................................... 3 3. UP CONVERTER .................................................................................................................................. 3 4. FREQ. REF. ........................................................................................................................................... 3 5. MEAS & PRECORRECTION ................................................................................................................. 3 6. TLS/TLC & RF DETECTOR .................................................................................................................. 3 7. RF POWER AMPLI ................................................................................................................................ 3 8. FAN BOARD .......................................................................................................................................... 3 9. OUPUT COUPLER ................................................................................................................................ 3 10. RF DRIVER AMPLI ............................................................................................................................ 3 11. POWER SUPPLY .............................................................................................................................. 3 1.3 PICTURE ................................................................................................................................................ 5 1.1 PURPOSE The document purpose is to give the sufficient and necessary informations about the SCHEMATIC of the equipment 1.2 COMPOSITION The equipment is composed of the following functional blocks: 1. AGILE DOWN CONVERTER _NOT EQUIPPED 2. DIGITAL CORE 3. UP CONVERTER 4. FREQ. REF. 5. MEAS & PRECORRECTION 6. TLS/TLC & RF DETECTOR 7. RF POWER AMPLI 8. FAN BOARD 9. OUPUT COUPLER 10. RF DRIVER AMPLI 11. POWER SUPPLY 1 2 3 4 5 6 7 8 9 10 11 1.3 PICTURE 1. Open Top Vieview 2. Front Vieview 3. Rear Vieview 4. Right Side Vieview 1. Left Side Vieview AGILE DOWN CONVERTER

ID Label/Location Info

FCC ID PLVSTD201UB-ARK6 FCC ID PLVSTD201UB-ARK6 FCC ID PLVSTD201UB-ARK6 FCC ID PLVSTD201UB-ARK6 FCC ID PLVSTD201UB-ARK6 FCC ID PLVSTD201UB-ARK6 FCC ID PLVSTD201UB-ARK6 FCC ID PLVSTD201UB-ARK6 FCC ID PLVSTD201UB-ARK6 FCC ID PLVSTD201UB-ARK6

Internal Photos

Operational Description

SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA Pagina 1 di 3 1 OPERATIONAL DESCRIPTION SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA Pagina 2 di 3 CONTENTS 1.1 PURPOSE .............................................................................................................................................. 3 SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA Pagina 3 di 3 1.1 Operational Description The SDT-201UB ARK6 Transmitter is composed of a sophisticated software controlled ATSC exciter, a linear UHF amplifier, and emission masks filter. The ATSC exciter is an ATSC professional exciter, designed for the most demanding digital broadcasting applications. It receives the input transport stream and processes the signal. It integrates a modulator module that incorporates modulus/group delay software precorrection as well as AM/PM software precorrection for the power amplifier and emission mask filter. Very high linearity performance is possible thanks to very careful RF design over the entire UHF band and with an optimal digital precorrection engine working simultaneously in the time and frequency domains. A high degree of reliability is guaranteed, moreover, by the use of four amplifiers operating in parallel and softfail operation. Multiple power supplies are operated in parallel to reduce the possibility of single-point failure modes. Also, multiple cooling fans are used to keep the operational temperature of critical components Due to the unique design, the transmitter amplifier is suitable to any digital TV standard: ATSC, ATSC-MH, ISDB-T, DVB-T, DVB-H and DMB-T. It is only necessary to reconfigure the modulator and use the appropriate RF output band pass filter. The remaining components may be used without any change. The emission mask filter is a low-loss filter that reduces the out-of-channel radiation to limits that are acceptable to prevent interference to other services and eliminate harmonic radiation.

Parts List/Tune Up Info

SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA Pagina 1 di 8 TUNE –UP PROCEDURE SDT 201 UB ARK 6 SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA Pagina 2 di 8 CONTENTS 1.1 PURPOSE .............................................................................................................................................. 3 1.2 CHANNEL SETTING ............................................................................................................................. 5 1.3 OUTPUT POWER SETTING .................................................................................................................. 6 1.4 INPUT SELECTION ................................................................................................................................ 7 1.5 THRESHOLD SELECTION ................................................................................................................... 8 SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA Pagina 3 di 8 1.1 PURPOSE The document purpose is to give the sufficient and necessary information about: Power stage VDC 50 V VDC 3.8 V The quiescent current for each device is 1.3 Ampere SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA Pagina 4 di 8 Final stage_AB driver stage_A pre driver stage_A VDC 24 V /1.6 A each VDC 24 V / 250 mA each FINAL STAGES CURRENT VALUES ARE SLIGHTLY FREQUENCY DEPENDANT SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA Pagina 5 di 8 1.2 CHANNEL SETTING The channel setting operations are the following: 1. Connect the equipment by the front TCP/IP connector to the LAP TOP using the IP address shown by the front display. The following alternatives will appears 2. Once connected select the window(ON THE LEFT) to select to change the output channel Push down arrow and select the channel: 3. Save the new setting by pushing SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA Pagina 6 di 8 1.3 OUTPUT POWER SETTING The output power setting (MAX POWER in ATSC MODE is 125 W = 51 dBm) operations are the following: 1. Connect the equipment by the front TCP/IP connector to the LAP TOP using the IP address shown by the front display. The following alternatives will appears 2. Once connected select the window to select to change the output power There are two possible option: a. in dBm (in this case the max value will be 43) b. in W ( in this case the max value will be 20) 3. Save the new setting by pushing SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA Pagina 7 di 8 1.4 INPUT SELECTION To select the input please operate as follows: 1. Connect the equipment by the front TCP/IP connector to the LAP TOP using the IP address shown by the front display. The following alternatives will appears 2. Once connected select the window 3. Select INPUT SELECTOR and by pushing the down arrow choose the defined input mode 4. Save the new setting by pushing SCREEN SERVICE BROADCASTING TECHNOLOGIES VIA Giuseppe Di Vittorio, 17 25 125 BRESCIA, ITALIA Pagina 8 di 8 1.5 THRESHOLD SELECTION The to select the FORWARD and TEMPERATURE threshold please operate as follows: 1. Connect the equipment by the front TCP/IP connector to the LAP TOP using the IP address shown by the front display. The following alternatives will appears 2. Once connected select the window 3. Select the FWD power THRESHOLD and select the Alarm level and the Warning level. 4. Select the Temperature THRESHOLD and select the Alarm level and the Warning level. 5. Save the new setting by pushing

Schematics

1 FL ASH_A25 1 VI RTE X_BUSY 1 HS W A P_E N 1 CCLK 1 RDW R_B 1 VI RTE X_DONE 1 FL ASH_R\ S\T\ 1 Ne t TP 144 _1 1 ARM - A3 1 ARM - A6 1 ARM - A12 1 ARM - A16 4 2TM S 1 FL ASH__R\S\ T\2\ 1 LED2- 0 1 LED2- 1 1 1M DC 1 CONFI G_0 1 CONFI G_1 1 ARM - D3 1 ARM CK 1 R\ S\ T\ - PSU 1 ARM - A25 1 Ne t TP 141 _1 1 NM EA _TX 1 NM EA _RX 1 ARM - A2 1 RS 232 TTL - RX 1 SDI O 1 ARM _ \ W \ E\ 1 1 CS B 1 R\ S\ T \ 1 I2C_SDA 1 ARM - A4 1 GB ETH_RS T 1 ARM - A8 1 DI SPL AY - RX 1 ARM - A14 1 ARM - A18 1 10M _EX 1 ARM - D1 1 ARM _ R\ D\ 1 ARM - A10 4B MDI1+ 1A 2M DI 0- 9A 1V8GA1 1 SDO4 1 AUX1 1 VBATT1 1 AUX3 1 AUX5 1 WAIT0 1 RT CXTO 1 R\ S\ T \ 1 Net TP97_1 1 Ne t TP 101 _1 1 Ne t TP 104 _1 1 CKOUT 18 GND 14 GND 16 GND 1 ARM - D13 1 ARM - D9 1 FPGA- CS 1 ARM - D11 1 GB _FR AM E- R DY 12 GND 10 GND 8 GND 1 ARM - A1 1 US B+ 4 GND 2 +3 . 3 V 1 GND 1 NC 4 Net D20_A 3 Ne t J P 5_3 14A +2 . 5 V 12A +2 . 5 V 12B +2 . 5 V 11B Ne t J 5 _11 B 0 3B MDI1- 5B MDI2- 2B MDI0+ 6B MDI2+ 9B 1V8GA1 8B MDI3+ 10BGND 8A 2M DI 3+ 6A 2M DI 2+ 4A 2M DI 1+ 7A 2M DI 3- 5A 2M DI 2- 10AGND 1 A\ S\ I \ _\ O\ U\ T\ _LP 1 AS I _OUT_ HP 1 A\ S\ I \ _\ O\ U\ T\ _HP 7 2TDO SHLD2 GND 0 GND 0 GND 1 SDO1 1 S\ D\ O\1 1 SDO2 1 S\ D\ O\2 1 S\ D\ O\4 1 FL ASH_W AIT1 1 FL ASH_CK 1 FL ASH-A\ D\V\2 6 2TDI 5 2TCK 1 Ne t TP 146 _1 1 NOBL I NK 4 TDO 5 TDI 1 +2 . 5 V 2 GND 1 FL ASH_O\ E\ 2 +1 . 8 V 1 GND 1 1M DI O 1 LED_LINK0 1 ACTI VI TY0 1 LED_LINK1 1 ACTI VI TY 1 1 CONFI G_2 1 CONFI G_3 1 CONFI G_4 1 CONFI G_5 1 1GRXD0 1 1GRXD1 1 2GTXD2 1 2GTXD3 1 1GTXD0 1 1GTXD1 1 1GTXD2 1 1GTXD3 1 2GRXD0 1 2GRXD1 4 FE_P0 6 FE_P1 8 +5 . 5 V 2 RX 4 GND 6 +5 . 5 V 2 GND 3 DI SPL AY - RX 1 54M HZ 10 FE_P2 12 FE_P3 14 FE_P4 1 AUX_P 35 1 AUX_P 38 1 AUX0 18 GND 20 FE_P6 55 GND 57 OUTDC- ATT- CLK 1 AUX15 1 D_ I N_ 1 1 AUX2 26 FE_P9 24 FE_P8 51 AUX_N36 49 GND 47 AUX_N35 32 GND 30 FE_P11 41 AUX_N33 43 GND 45 AUX_N34 40 FE_P15 38 FE_P14 36 FE_P13 35 AUX_N31 37 GND 1 SOFT- START15 4 GND 46 GND 44 FE_P17 42 FE_P16 29 AUX_N29 31 GND 5 GND 3 GND 50 FE_P19 52 FE_PHR 23 AUX_N27 25 GND 4 GND 56 FE_TTL2 58 GND 19 GND 17 AUX_N25 15 AUX_N24 1 Ne t R2 92_ 2 1 +1 5 V 2 Ne t P7 _2 1 S\ T\ D\ B\ Y\ 1 RT CXTI 64 FE_TTL8 62 FE_TTL6 13 GND 11 AUX_N23 9 AUX_N22 1 Ne t C1 88_ 1 3 485_TX1 2 GND 1 Ne t TP 95_ 1 1 Net TP99_1 1 Ne t R2 30_ 2 1 Ne t TP 105 _1 1 DB GRQS 17 DB GRQS 13 Net P2_13 15 R\ S\ T \ 72 FE_TTL14 70 FE_TTL12 68 FE_TTL11 5 AUX_N21 3 AUX_N20 1 ARM - D12 1 ARM - D8 1 FL ASH2_R\S\ T\ 1 ARM - D10 1 ARM - A22 1 ARM - A23 1 GB _FR AM E- R DY 2 1 ARM - A24 11 GND 9 Ne t P2 _9 7 Ne t P2 _7 78 76 FE_SDA 74 FE-CK 1 Net TP71_1 2 GND 3 RS 232 - RX 0 1 ARM - A0 1 CRYPT UC 1 VI RTE X_P ROGB 1 US B- 1 ARM - C\ S \ 0 1 RS232TTL - TX 1 ARM _ C\ S \ 3 1 ARM _ C\ S \ 2 3 Ne t C2 02_ 1 1 +3 . 3 V 1 SDO 3 +3 . 3 V 1 GND 2 Ne t P1 _2 1 RS 232 - TX 0 1 SCLK 1 RS 232 - RX 0 1 ARM _ \ W \ E\ 0 1 BOOTE N 4 GND 1 CK1HZ 4 GND 1 10M HZ 1 1PPS_EX 3 GND 4 +5 . 5 V 5 GND 6 +1 5 V 0 1 MEAS-TTL12 9 GND 10 1PPS_OUT 11 GND 12 10M HZ- OUT 1 485B 3 +1 5 V 4 +1 5 V 2 485A 7 GND 8 RF L- I N 9 GND 10 GND 13 +1 . 8 V 14 +2 . 5 V 15 GND 16 +2 . 5 V 19 GND 20 +5 . 5 V 24 +3 . 3 V 23 +3 . 3 V 22 +5 . 5 V 21 GND 30 +3 . 3 V 29 GND 28 +3 . 3 V 27 GND 26 +3 . 3 V 25 GND 36 +1 . 8 V 35 GND 34 +1 . 8 V 33 GND 41 GND 42 +1 V 40 +1 V 39 +1 V 45 GND 46 +1 V 47 CRYPT- PS U 48 +1 V 54 RS 232 _TX 53 RS 232 _RX 52 RS 232 TTL - TX 51 I2C_SDA 17 GND 18 I2C_SDA 1 MEAS-TTL6 1 MEAS-TTL8 9 GND 10 MEAS-TTL4 11 GND 12 MEAS-TTL5 13 GND 14 CRYPT- M EAS 3 GND 4 MEAS-TTL1 5 GND 6 MEAS-TTL3 7 GND 8 MEAS-TTL9 80 2- OVERP 79 2- OVERN 78 2- DP15 77 2- DN15 74 2- DP13 73 2- DN13 72 2- DP12 71 2- DN12 68 2- DP10 67 2- DN10 66 2- DP9 65 2- DN9 61 2- CKOUTN 57 2- DN6 59 2- DN7 58 2- DP6 60 2- DP7 62 2- CKOUTP 55 2- DN5 53 2- DN4 51 2- DN3 52 2- DP3 54 2- DP4 56 2- DP5 48 2- DP1 47 2- DN1 46 2- DP0 45 2- DN0 42 GND 41 GND 40 OV ERP 39 OV ERN 36 DP 14 35 DN14 34 DP 13 33 DN13 30 DP 11 29 DN11 28 DP 10 27 DN10 26 DP 9 25 DN9 19 DN7 20 DP 7 24 DP 8 23 DN8 22 CKOUTP 21 CKOUTN 13 DN4 14 DP 4 15 DN5 16 DP 5 7 DN1 8 DP 1 9 DN2 10 DP 2 1 +5 . 5 V 3 +5 . 5 V 4 +5 . 5 V 2 +5 . 5 V 15 NM EA _TX 16 10M _EX 17 NM EA _RX 18 I2C_SDA 19 CRYPT- PL LDC 20 I2C_SCL 14B +2 . 5 V 1B MDI0- 7B MDI3- 2A 2M DI 0+ 3A 2M DI 1- 1 AS I _OUT_ LP 1 SDO3 1 S\ D\ O\3 6 TM S 0 GND 3 TCK 1 FL ASH-C\ S\ 1 2GTXD0 1 2GTXD1 1 2GRXD2 1 2GRXD3 1 1GRXD2 1 1GRXD3 1 GB ETH_RS T 3 FE_N0 5 FE_N1 7 +5 . 5 V 0 GND 9 FE_N2 11 FE_N3 13 FE_N4 1 AUX_N39 1 AUX_N38 17 GND 19 FE_N6 58 OUTDC- ATT- L E 56 GND 1 Ne t C1 78_ 2 1 Ne t C1 79_ 1 1 VC2 25 FE_N9 23 FE_N8 52 AUX_P 36 48 CRYPT_OUTDC 50 GND 31 GND 29 FE_N11 42 AUX_P 33 44 GND 46 AUX_P 34 39 FE_N15 37 FE_N14 35 FE_N13 36 AUX_P 31 38 GND 3 GND 45 GND 43 FE_N17 41 FE_N16 30 AUX_P 29 32 GND 2 GND 2 GND 51 FE_PHV 49 FE_N19 24 AUX_P 27 26 GND 5 GND 57 FE_TTL5 55 FE_TTL3 20 GND 18 AUX_P 25 16 AUX_P 24 63 FE_TTL9 61 FE_TTL4 14 GND 12 AUX_P 23 10 AUX_P 22 3 485A 2 GND 71 FE_TTL15 69 GND 67 FE_TTL13 6 AUX_P 21 4 AUX_P 20 77 75 FE_SCL 73 GND 1 RS232_TX 2 GND 1 Ne t TP 80_ 1 1 ARM - C\ S \ 1 2 Ne t C2 79_ 1 5 GND 5 GND 1 10M HZ- OUT 5 GND 6 R\ S\ T \ - P SU 11 +2 . 5 V 12 +2 . 5 V 17 GND 18 +5 . 5 V 43 GND 44 +1 V 38 +1 . 8 V 37 GND 32 +3 . 3 V 31 GND 49 I2C_SCL 50 RS 232 TTL - RX 15 GND 16 I2C_SCL 1 MEAS-TTL7 1 MEAS-TTL11 76 2- DP14 75 2- DN14 70 2- DP11 69 2- DN11 64 2- DP8 63 2- DN8 1 GND 2 MEAS-TTL0 50 2- DP2 44 GND 43 GND 49 2- DN2 38 DP 15 37 DN15 11 DN3 12 DP 3 17 DN6 18 DP 6 32 DP 12 31 DN12 5 DN0 6 DP 0 1 ARM - D15 1 ARM - D7 1 ARM - D5 1 INIT-B 20 GND 6 GND 2 GND 1 ARM - A7 1 ARM - A13 1 ARM - A17 SHLD1 GND 13A Net J5_13A SHLD3 GND 11A Net J5_11A 0 GND 0 GND 0 GND 1 CL EN1 1 CL EN2 1 CL EN3 1 CL EN4 1 FL ASH_W \E\ 3 2T\R\ S\T\ 1 2M DC 1 2M DI O 1 Net TP147_1 2 +5 . 5 V 59 CL K12 0_DAC 53 OU TDC - AT T- D 1 TX 3 GND 5 +5 . 5 V 1 DI SPL AY - TX 16 FE_P5 28 FE_P10 22 FE_P7 27 AUX_N28 33 AUX_N30 39 AUX_N32 1 AM P- I N 1 1PPS- OUT 48 FE_P18 34 FE_P12 54 FE_TTL0 21 AUX_N26 7 +5 . 5 V 1 +5 . 5 V 2 GND 1 RS 232 - TX 0 1 485_RX1 1 ARM - D14 1 ARM - D6 1 ARM - D4 1 ARM…

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Schematics

11 22 33 44 D D C C B B A A Title Number Revision Size A4 Date: 18/01/2011 Sheet of File: Z:\ARK6\..\ASI OUT.SchDoc Drawn By: ARK6_MB_E - ASI_Out CONFIDENTIAL ASI_OUT_HPASI_OUT_HP ASI OUT HP ASI_OUT_HP ASI_OUT_HP TP4TP22 1 2 J3EDGE-BNC ASI_OUT_LPASI_OUT_LP ASI OUT LP ASI_OUT_LP ASI_OUT_LP TP40TP41 1 2 J6EDGE-BNC ASI_Out1 TAB TAB SDI0P 1 SDI0N 2 EN_EQ0 3 EN_EQ1 4 SDI1P 5 SDI1N 6 SD/HD1 7 PD1 8 AVDDI 9 PD_MODE 10 AVDDREG1 11 SDO1A 12 SDO1B 13 AVDDREG1 14 AVDDO1 15 AVDDO0 16 AVDDREG0 17 SDO0B 18 SDO0A 19 AVDDREG0 20 XPT_CTRL 21 Z_CTRL 22 PD0 23 SD/HD0 24 U48M21528 R82750 C122 10n C121 1u C119 10n C117 1u AVDDAVDD ASI_Out2ASI_Out3ASI_Out4 C110 4u7C116 4u7 +1.8V C124 100u-6.3V C128 100u-6.3V AVDD R4 75 L6 1nH SD/HD0EN_EQ0PD0XPT_CTRLPD_MODESD/HD1EN_EQ1PD1 L11 22uH C123100n AVDD R81Not Mount R860 R870 R11Not Mount R64Not Mount +1.8V R91Not Mount R92Not Mount R651K R751K R78 75 L9 1nH +1.8V AVTT C111100n AVTT R134 Not Mount R119 0 R84 0 11 22 33 44 D D C C B B A A Title Number Revision Size A4 Date: 18/01/2011 Sheet of File: Z:\ARK6\..\ARK6_FrontEnd-connector.SchDoc Drawn By: +5.5V +5.5V FE-PhVFE-PhR FE-CK FE_SCL FE_SDA +15V +15V Frontend FE_P0FE_P1FE_P2FE_P3FE_P4FE_P5FE_P6FE_P7FE_P8FE_P9FE_P10FE_P11FE_P12FE_P13FE_P14FE_P15FE_P16FE_P17FE_P18FE_P19 FE_N0FE_N1FE_N2FE_N3FE_N4FE_N5FE_N6FE_N7FE_N8FE_N9FE_N10FE_N11FE_N12FE_N13FE_N14FE_N15FE_N16FE_N17FE_N18FE_N19 R193 10K R157 10K C2610u C2510u FE_PhV FE_PhR VCCA 1 GND 2 A 3 B 4 DIR 5 VCCB 6 U16SN74LVC1T45DBV +2.5V +3.3V CRYPT_DIR_FE C162 100n C163 100n +3.3V +2.5V CRYPT_FE CRYPT_FE CRYPT-FE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 JP7HEADER 40X2 FE-PhV FE-PhR FE_SCL FE_SDA FE-CK FE_TTL[0..15] FE_TTL[0..15] FE_N[0..19] FE_P[0..19] FE_P[0..19]FE_N[0..19] CRYPT_DIR_FE CRYPT-FE FE_TTL0 FE_TTL1 FE_TTL2 FE_TTL3 FE_TTL4FE_TTL5 FE_TTL6 FE_TTL7 FE_TTL8 FE_TTL9 FE_TTL10FE_TTL11FE_TTL12 FE_TTL13 FE_TTL…

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