QR8-MT0760UD2PBluetooth USB Dongle, Class 2

LNA PA VCO Filter PLL GMSK Modem Baseband 8051 Processor GPIOs OCI FLASH 64kB RAM JTAG RAM UART0/SPI UART1/SPI PCM USB 1.1 3V Regulator 24MHz Crystal USB Connector Rx Tx Antenna Balun MT0760-UD-2 Module Block Diagram

Federal Communication Commission Equipment Authorization Division, Application Processing Branch 7435 Oakland Mills Road Columbia, MD 21048 December 27, 2002 TO WHOM IT MAY CONCERN Pursuant to Paragraphs §0.457 and 0.459 of the Commission’s Rules (47 C.F.R.) and Section §552(b)(4) of the Freedom of Information Act, Microtune, Inc. requests confidentiality for the following product: FCC ID Number Product Title/Model QR8-MT0760UD2P MT0760-UD2P For the product stated above, we request that the following information be held confidential: 1) Exhibit 1. Electrical Schematics of the Circuitry: SC-00049-1-0 2) Exhibit 2. Tune-up procedure: SPEC-00038 USB Dongle Production Development Rev 03 3) Exhibit 3. Bill of Materials: BOM-class 2 No other items submitted as part of the equipment authorization filing process are deemed confidential. The above exhibits contain Microtune, Inc. trade secrets and proprietary information that could be of benefit to our competitors regarding the design of our mobile handset. This material is not customarily available to the general public and we request that it be withheld from public inspection. If you have any questions, please feel free to contact me at the address shown below. Sincerely, Pete Krebill Engineer Cetecom Inc. 411 Dixon Landing Rd Milpitas, CA 95035 (408) 586-6200

Microtune USB Slave dongle

Microtune, Inc.MT0760-UD2P Input: DC 5V FCC ID: QR8-MT0760UD2PClass 2Made in the Philippines 37.8 ± 0.2mm USB Dongle Class 2 Label (approved) 17.8 ± 0.2mm Letter Height 1.45 mm Arial Bold Letter Height 1.3 mm Arial Letter Height 1.3 mm Arial Logo 5 x 5 mm Logo 4 x 4 mm(All 3 logos)

Microtune USB Dongle : Cable free MT0760-CF30/100 Operational Description Hopping sequence is generated (pseudorandomly) In total, 10 types of hopping sequences are defined .five for the 79-hop and five for the 23-hop system, respectively. Using the notation of parentheses () for figures related to the 23-hop system, these sequences are: •A page hopping sequence with 32 (16) unique wake-up frequencies dis-tributed equally over the 79 (23) MHz, with a period length of 32 (16); •A page response sequence covering 32 (16) unique response frequencies that all are in an one-to-one correspondence to the current page hopping sequence. The master and slave use different rules to obtain the same sequence; •An inquiry sequence with 32 (16) unique wake-up frequencies distributed equally over the 79 (23) MHz, with a period length of 32 (16); •A inquiry response sequence covering 32 (16) unique response frequen-cies that all are in an one-to-one correspondence to the current inquiry hop-ping sequence. •A channel hopping sequence which has a very long period length, which does not show repetitive patterns over a short time interval, but which dis-tributes the hop frequencies equally over the 79 (23) MHz during a short time interval; For the page hopping sequence, it is important that we can easily shift the phase forward or backward, so we need a 1-1 mapping from a counter to the hop frequencies. For each case, both a hop sequence from master to slave and from slave to master are required. The inquiry and inquiry response sequences always utilizes the GIAC LAP as lower address part and the DCI as upper address part in deriving the hopping sequence, even if it concerns a DIAC inquiry. Example of the hopping sequence channels (hopset table) The selection scheme consists of two parts: • selecting a sequence; • mapping this sequence on the hop frequencies; The general block diagram of the hop selection scheme is shown in 1. The mapping from the input to a particular hop frequency is per-formed in the selection box. Basically, the input is the native clock and the cur-rent address. In CONNECTION state, the native clock (CLKN) is modified by an offset to equal the master clock (CLK). Only the 27 MSBs of the clock are used. In the page and inquiry substates, all 28 bits of the clock are used. How- ever, in page substate the native clock will be modified to the master’s estimate of the paged unit. The address input consists of 28 bits, i.e., the entire LAP and the 4 LSBs of the UAP. In CONNECTION state, the address of the master is used. In page sub-state the address of the paged unit is used. When in inquiry substate, the UAP/LAP corresponding to the GIAC is used. The output constitutes a pseudo- random sequence, either covering 79 hop or 23 hops, depending on the state. For the 79-hop system, the selection scheme chooses a segment of 32 hop frequencies spanning about 64 MHz and visits these hops once in a random order. Next, a different 32-hop segment is chosen, etc. In case of the page, page scan, or page response substates, the same 32-hop segment is used all the time (the segment is selected by the address; different units will have differ-ent paging segments). In connection state, the output constitutes a pseudo-random sequence that slides through the 79 hops or 23 hops, depending on the selected hop system. Figure 1. For the 79-hop system, the selection scheme chooses a segment of 32 hop frequencies spanning about 64 MHz and visits these hops once in a random order. Next, a different 32-hop segment is chosen, etc. In case of the page, page scan, or page response substates, the same 32-hop segment is used all the time (the segment is selected by the address; different units will have differ-ent paging segments). In connection state, the output constitutes a pseudo-random sequence that slides through the 79 hops or 23 hops, depending on the selected hop system. The principle is depicted in Figure 2.0 SELECTION BOX ULP/LAP CLOCK 28 27 Hop Frequencies 23/79 mode 0 64...............781.......................77 Seg 1 Seg 2 Seg 3 The hop selection kernels for the 79 hop system are shown in Figure 3.0 The X input determines the phase in the 32-hop segment, whereas Y1 and Y2 selects between master-to-slave and slave-to-master transmission. The inputs A to D determine the ordering within the segment, the inputs E and F determine the mapping onto the hop frequencies. The kernel addresses a register containing the hop frequencies. This list should be created such that first all even hop fre- quencies are listed and then all odd hop frequencies. In this way, a 32-hop seg-ment spans about 64 MHz, whereas a 16-hop segment spans the entire 23-MHz. Figure 3.0 The selection procedure consists of an addition, an XOR operation, a permuta-tion operation, an addition, and finally a register selection. In the remainder of this chapter, the notation A i is used for bit i of the BD_ADDR. 11.2.1 First addition operation The first addition operation only adds a constant to the phase and applies a modulo 32 or a modulo 16 operation. For the page hopping sequence, the first addition is redundant since it only changes the phase within the segment. How- ever, when different segments are concatenated (as in the channel hopping sequence), the first addition operation will have an impact on the resulting sequence. ADD XOR PERM4 ADD A B CD EF MOD 16 Y2 XOR 0 2 4 . . 22 1 3 5 . . 21 11.2.2 XOR operation Let Z’ denote the output of the first addition. In the XOR operation, the four LSBs of Z’ are modulo-2 added to the address bits A 22-19 . The permutation operation involves the switching from 5 inputs to 5 outputs for the 79 hop system and from 4 inputs to 4 outputs for 23 hop system, in a manner controlled by the control word. Table 1 shows the control of the butterflies by the control signals P. Note that P 0-8 corresponds to D 0-8 , and, corresponds to for in Figure 3.0 Control Control Signal Butterfly signal Butterfly P 0 {Z 0 ,Z 1 } …

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CETECOM Inc. CETECOM Inc. 411 Dixon Landing Road, Milpitas, CA-95035, USA Phone: +1 408 586 6200 Fax: +1 408 586 6299 www.cetecom.com Issued test report consists of 58 Pages Page 1 (58) Test report no.: EMC_362_FCC15.247_2002 FCC Part 15.247 for FHSS systems / CANADA RSS-210 (MT0760-UD2P) FCC LISTED, REG. NO.: 101450 & RECOGNIZED BY INDUSTRY CANADA IC – 3925 CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 2 (58) Table of Contents 1 General information 1.1 Notes 1.2 Testing laboratory 1.3 Details of applicant 1.4 Application details 1.5 Test item 1.6 Test standards 2 Technical test 2.1 Summary of test results 2.2 Test report 1 General information 1.1 Notes The test results of this test report relate exclusively to the test item specified in 1.5. The CETECOM Inc. USA does not assume responsibility for any conclusions and generalisations drawn from the test results with regard to other specimens or samples of the type of the equipment represented by the test item. The test report may only be reproduced or published in full. Reproduction or publication of extracts from the report requires the prior written approval of the CETECOM Inc USA. TEST REPORT PREPARED BY: EMC Engineer: Harpreet Sidhu 1.2 Testing laboratory CETECOM Inc. 411 Dixon Landing Road, Milpitas, CA-95035, USA Phone: +1 408 586 6200 Fax: +1 408 586 6299 E-mail: [email protected] Internet: www.cetecom.com CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 3 (58) 1.3 Details of applicant Name : Microtune Inc. Street : 6440 Lusk Blvd., Suite D-205 City / Zip Code : San Diego, CA 92121 Country : USA Contact : Cory Vuong Telephone : +1 858 558 6088 Tele-fax : +1 858 558 6598 e-mail : [email protected] 1.4 Application details Date of receipt of application : 2002-10-12 Date of receipt test item : 2002-10-22 Date of test : 2002-10-22/23 1.5 Test item Manufacturer : Applicant Marketing Name : Bluetooth Dongle Class-2 Model No. : MT0760-UD2P (with plastic cover) MT0760-UD2 (without plastic cover) Description : Bluetooth Wireless USB Dongle HW / SW : 1.0 / 1.0 FCC-ID : QR8-MT0760UD2P Additional information Frequency : 2402MHz – 2480MHz Type of modulation : GFSK Number of channels : 79 Antenna : Internal Power supply : 3.7VDC Output power : 2.16dBm (1.644mW) max. EIRP Extreme vol. Limits : 3.1VDC – 3.7VDC Extreme temp. Tolerance : 0ºC – 55ºC 1.6 Test standards: FCC Part 15 §15.247 (DA00-705) Note: All radiated measurements were made in all three orthogonal planes. The values reported are the maximum values. CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 4 (58) 2 Technical test 2.1 Summary of test results No deviations from the technical specification(s) were ascertained in the course of the tests Performed Final Verdict: (only “passed” if all single measurements are “passed”) Passed Technical responsibility for area of testing: 2002-10-30 EMC & Radio Lothar Schmidt (Manager) Date Section Name Signature Responsible for test report and project leader: 2002-10-30 EMC & Radio Harpreet Sidhu (EMC Engineer) Date Section Name Signature CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 5 (58) 2.2 Test report TEST REPORT Test report no. : EMC_362_FCC15.247_2002 (MT0760-UD2P) CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 6 (58) TEST REPORT REFERENCE LIST OF MEASUREMENTS PAGE ANTENNA GAIN § 15.204 7 CARRIER FREQUENCY SEPERATION §15.247(a) 8 NUMBER OF HOPPING CHANNELS §15.247(a) 9 TIME OF OCCUPANCY (DWELL TIME) §15.247(a) 13 SPECTRUM BANDWIDTH OF FHSS SYSTEM §15.247(a) 16 POWER SPECTRAL DENSITY §15.247 (d) 20 MAXIMUM PEAK OUTPUT POWER § 15.247 (b) (1) 24 BAND EDGE COMPLIANCE §15.247 (c) 32 EMISSION LIMITATIONS § 15.247 (c) (1) 36 CONDUCTED EMISSIONS § 15.107/207 50 RECEIVER SPURIOUS RADIATION § 15.209 51 TEST EQUIPMENT AND ANCILLARIES USED FOR TESTS 56 BLOCK DIAGRAMS 57 NOTE: This test report is valid for following two Models; Model No. : MT0760-UD2P With Plastic cover Model No. : MT0760-UD2 Without Plastic cover EUT complies with specifications of FCC 15.247 with and without plastic cover on it. CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 7 (58) ANTENNA GAIN § 15.204 The antenna gain of the complete system is calculated by the difference of conducted power of the module and the radiated power in EIRP. Low channel Mid channel High channel Conducted Power 0.01dBm -0.67dBm -1.70dBm Raidated Power (EIRP) 1.89dBm 2.1dBm 2.16dBm Antenna Gain +1.88dBi +2.77dBi 3.86dBi The calculated antenna gain is between +1.88dBi and +3.86dBi. CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 8 (58) CARRIER FREQUENCY SEPERATION §15.247(a) CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 9 (58) NUMBER OF HOPPING CHANNELS §15.247(a) The number of hopping channels is 79 (see next 4 plots) The right red line corresponds to the left red line from the next plot. Plot 1: Total 23 CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 10 (58) Plot 2: Total 25 CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 11 (58) Plot 3: Total 19 CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 12 (58) Plot 4: Total 12 CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue date:2002-10-30 Page 13 (58) TIME OF OCCUPANCY (DWELL TIME) §15.247(a) DH1 – Packet The system makes worst case 1600 hops per second or 1 time slot has a length of 625μs with 79 channels. A DH1 Packet need 1 time slot for transmitting and 1 time slot for receiving. Then the system makes worst case 800 hops per second with 79 channels. So you have each channel 10.13 times per second and so for 30 seconds you have 303.9 times of appearence . Each Tx-time per appearence is 441.12 μs. So we have 303.9 * 441.12 μs = 134 ms per 30 seconds. CETECOM Inc. Test report no.:EMC_362FCC15.247_2002 Issue …

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