MI7-B32450-25Base Station Data Radio

I I P P S S e e r r i i e e s s B B 3 3 2 2 4 4 5 5 0 0 - - 2 2 5 5 B B a a s s e e S S t t a a t t i i o o n n P P r r o o d d u u c c t t O O w w n n e e r r ’ ’ s s M M a a n n u u a a l l Date Released: January 23, 2004 Document #: 516-80520-POM Version: A Copyright 2004 IPMobileNet, Inc. . 16842 Von Karman Avenue, Suite 200  Irvine, CA 92606 Voice: (949) 417-4590 Fax: (949) 417-4591 401855 Page 2 The term “IC”: before the radio certification number only signifies that Industry of Canada technical specifications were met. Operation is subject to the following two (2) conditions: (1) this devise may not cause interference, and (2) this device must accept any interference, including interference that may cause undesired operation of this device. The following U.S. Patents apply to this product: U.S. Patent numbers 5,640,695,6,018,647,6,243,393 Information contained in this document is subject to change without notice. All rights reserved. Reproductions, adaptations, or translation without prior written permission is prohibited, except as allowed under copyright laws. TABLE OF CONTENTS 401855 Page 3 SECTION 1: THEORY OF OPERATION .............................................................................................. 4 General Block Diagram.................................................................................................................. 4 General Block Diagram Definitions ..................................................................................... 4 Input/Output........................................................................................................... 4 System Controller................................................................................................... 4 Modems ........................................................................................................... 5 Diversity Reception .......................................................................................... 5 RX Injection............................................................................................................ 5 Transmitter ............................................................................................................. 5 Receiver 1/ 2/ 3 ...................................................................................................... 5 Power Supply......................................................................................................... 5 B32450-25 Base Station Section Descriptions........................................................................... 6 System Controller ................................................................................................................ 6 Input/Output ........................................................................................................................ 6 Modem Switching ................................................................................................................ 6 Modem ...............................................................................................................................7 Receive Signal Strength Indication Comparator ................................................................. 7 Baseband ............................................................................................................................ 8 Receiver Board ................................................................................................................... 8 IF Amplifier .......................................................................................................................... 8 Receiver Injection ................................................................................................................ 9 Exciter Board ....................................................................................................................... 9 Analog Modulation ............................................................................................................ 10 Phase Locked Loop .......................................................................................................... 10 Power Amplifier ................................................................................................................. 11 SECTION 2: FACTORY TEST PROCEDURE.......................................................................................... 12 Equipment List............................................................................................................................. 12 Programming and Configuring the Base Station..................................................................... 13 Adjustment / Alignment Procedure............................................................................................ 14 Receiver Injection .............................................................................................................. 14 Receiver ............................................................................................................................ 14 Diversity Reception ........................................................................................................... 15 Receive Data ..................................................................................................................... 16 Exciter ............................................................................................................................. 17 Power Amplifier ................................................................................................................. 17 SECTION 3: FCC LABEL.......................................................................................................................... 18 B32450-25 Base Station FCC Label Placement........................................................................ 18 B32450-25 Base Station FCC Label...............................................................................…

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Modulation: FSK DC Voltages: 13.8 V

Item 1. Please provide appropriate antenna installation instructions and include antenna separation for RF exposure compliance. From: CKC Laboratories, Inc. Date: 2/27/04 Response: The base station does not have antenna installation instruction because of the numerous options for the application. No antenna is sold with this device. CKC CS: This base station equipment does not operate under SMRS bands. Item 2. Please provide a detailed description of the modulation system to be used including response characteristics: frequency, phase and amplitude of any filters provided and a description of the modulating wave train. According to the operational description a low pass audio filter “U10” is used prior to the VCO module. Please provide a response curve for this audio filter. From: CKC Laboratories, Inc. Date: 2/27/04 Response: A copy of the modem data sheet which has all the specifications of the data modulation has been uploaded. Also, with regard to U10, the part number is MAX 7401ESA and the data sheet, with response curves is also attached. CKC CS:

Front 1 Front 2 Back 1 Back 2 Top Bottom Side Both sides of the equipment are idential in both construction and function.

B32450-25 Base Station FCC Label Placement LABEL B32450-25 Base Station FCC Label

Internal All Internal Controller Internal TX Internal RX PCB Control Top All PCB Control Bottom All PCB Control Top 1 PCB Control Top2 PCB Control Top 3 PCB TX Controller Top PCB TX Controller Bottom PCB TX Output Top PCB TX Output Bottom PCB RX Top PCB RX Bottom PCB RX Controller Top PCB RX Controller Bottom

 GENERAL BLOCK DIAGRAM General Block Diagram Definitions For increased data security, the modem supports the U.S. Government developed Digital Encryption Standard (DES) data encryption and decryption protocols. This capability requires installation of third- party IP compliant DES encryption and decryption software. The standard IPSeries base station circuit board contains five (5) main sections defined below: Input/Output Circuitry associated with one of the following base station’s data connectors: ‰ RS232 Serial Port DB9 Data Connector ‰ RJ45 Ethernet 10 Base T Interface Connection System Controller Houses the modem, diversity, and Ethernet circuitry. Manages the operation of the base station’s modem providing transmit timeout protection in the event a fault causes the base station to become halted in the transmit mode. The system controller also handles the loading of selected transmit and receive frequencies into the injection synthesizer. Includes memory for storage through Electrically Erasable Programmable Read Only Memory (EEPROM) of the base station’s operating parameters, which are retained after the base stations power is cycled off. Modems Convert data into an analog audio waveform for transmission and analog audio from the receiver to serial data interface. There is one (1) modem that is dedicated to the transmit operation and two (2) modems dedicated to the receive operation. The modem dedicated to transmitting supports a 115.2 KBPS data transmission rate on the serial port, SLIP protocol, and a 32 KBPS over-the-air data transmission rate. Provides Forward Error Correction (FEC) and Error Detection (CRC), bit interleaving for more robust data communications, and third generation collision detection and correction capabilities. Diversity Reception Circuitry selects one of three (3) diversity receiver audio outputs for processing by the modem by comparing the Received Signal Strength Indication (RSSI) output from each receiver. Audio from the receiver with the highest RSSI value is passed to the modems. RX Injection The Injection Synthesizer board provides a highly stable local oscillator signal for the three (3) receivers. This displays a serial data input/output interface, synthesizer, and VCO. Transmitter Consists of an exciter and a power amplifier module covering various frequency bands in segments. A different power amplifier module is required for each segment. The transmitter power control is included with the power supply circuitry on the same board. Receiver 1/Receiver 2/ Uses three (3) discrete receivers tuned to the same frequency. Receiver 3 The three (3) receivers are required to support IPMobileNet’s base station Diversity Reception System (DRS). NOTE : Some installations use only two (2) receivers. The receivers are double-conversion superhetrodynes with an Intermediate Frequency (IF) of 45 MHz. Each receiver consist of bandpass filters, RF amplifiers, a mixer, 45 MHz crystal filter, and a one-chip IF system. The injection synthesizer provides the first local oscillator signal and outputs from each receiver including RSSI and analog audio for Diversity Reception. Power Supply Power supply circuitry derives the various operating voltages required by the base station. Fixed voltage regulators are employed through the base station for this purpose. B32450-25 Base Station Section Descriptions System Controller This section displays the Central Processing Unit (CPU)(U1), clock, and power-on reset circuitry. It provides more processing power than required for future capabilities to be incorporated without changing processors. Such capabilities include data encryption/decryption (DES) and remote fault monitoring. U1 features a 16-bit address bus and 128K of internal flash random access memory (RAM). NOTE : To enter the programming mode it is necessary to reset the switch (S1) and power up again. CPU operations are controlled by Y3 an 18.432 MHz clock module. Capacitor (C1) and an internal Schmidt trigger circuit inside of U1 generates the power on reset signal. The RESET* output from U1 drives a latch and decoder found elsewhere on the board. This section displays the RAM, decoder, EEPROM, and programming power supply circuitry. U2 is a 512K x 8 bit static RAM chip, which provides temporary storage of base station configuration data while the power is on. This is necessary in order to program the base station. U2 is controlled directly by the address, data, and control busses from the CPU. Chip U5 decodes the A11-A14 address bus to provide chip selects for the modem and EEPROM memory. Chip U6 is an 8-bit latch. It latches inputs from the D0-D7 bus and lights the front panel status indicators ( TX, CD, RX1, RX2, and RX3). Chip U3 is a serial EEPROM, which provides 2K bits of pre-programmed data storage for the CPU. Data is clocked out of U3 by EECLK, and back into the CPU via EEDATA. A programming power supply is required for the flash RAM inside of the CPU, and this function is performed by U4. This chip is a low dropout voltage regulator with a shutdown control. Resistors R22 and R21 set the output voltage. When the base station configuration data is to be stored in flash RAM, the CPU makes VPP_ENABLE high. This turns on the regulator, producing a 12-volt output via VPP for the flash RAM. This section displays a dedicated processor and voltage regulator. Chip U7 is a processor, which permits manual keyboard operation of the base station. Regulator VR2 provides 5 volts DC power for all logic circuitry on the System Controller Board. Input/Output This section displays the CPU input/output circuitry. Chip U8 is an RS232 transceiver, which interfaces the CPU to the modem via J1. From there, the RS232 data goes directly to a rear panel DB9 connector. U8 converts 5-volt logic-level data to +/-12 volt data in RS232C form, and vice-versa. A charge pump power supply on the chip converts the +5 volt DC power to the +/-12 volt levels required. The charge pump uses capacitors…

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Trimble Key Features and Benefits • 3.3 V for battery powered applications • Programmable power management • Sized for portable devices Lassen LP GPS Low power module for portable applications Trimble’s new Lassen ™ LP GPS is a low power miniature GPS receiver module that is ideal for power-conscious portable appli- cations. It is intended specifically for system designers and integra- tors who are developing the next generation of portable devices. This embedded technology gives the system developer the programming flexibility to achieve a significant reduction in power consumption. Power management The Lassen LP GPS features a new set of power management tools that puts the power budget decision in the developer’s hands. The developer now can deter- mine the best balance between operational frequency and power conservation for a particular application. In Schedule Track ™ operat- ing mode, the developer can program the unit to power up, quickly acquire satellites and out- put position to a schedule. After gathering satellite data and com- puting its location, the receiver may be directed to power down to a minimal mode of operation for a programmed interval or until awakened by a hardware interruption. Schedule Track provides hot start performance at a programmed interval or in response to a hardware event. Schedule Track mode provides an advantage over normal battery-backed fast start modes with automatic wakeup to maintain current satellite data for fastest possible acquisition. Schedule Track offers the lowest power consumption in a deep sleep mode but provides position data as quickly as possible when needed. Ease of integration Lassen LP GPS provides a choice of data protocols for maximum flexibility. The TSIP binary data protocol incorporates new power management features and provides maximum control over system operation. The TAIP and NMEA protocols are available where ASCII data is preferred. A secondary serial input port is available for RTCM SC-104 differential correction data for high accuracy applications. The Lassen LP GPS also incorporates Trimble’s antenna detection and protection circuit to monitor the condition of the antenna system. And a new high performance, miniature 3.3 V antenna is available for the Lassen LP GPS. Getting started The Starter Kit makes it easy to evaluate the Lassen LP GPS and begin development. Actual size Lassen LP GPS Low power module for portable applications PHYSICAL CHARACTERISTICS Dimensions2.605′′L×1.250′′W×0.475′′H (66.167 mm×31.750 mm×12 mm) Weight0.4 oz. (12.5 grams) ConnectorsRF:right angle MCX Power, I/O:8-pin (2×4), 2 mm header ACCESSORIES GPS antennaCompact, 3.3 V active micropatch antenna with 5-meter cable and magnetic mount. 1.65′′×1.99′′×0.55′′high (42 mm×50.5 mm×13.8 mm) ORDERING INFORMATION Module Lassen LP GPS Module, Extended Temperature, TSIP (binary) protocol, NMEA 0183 (ASCII) protocol and TAIP (ASCII) protocol, DGPS ready Antennas 3.3 V antenna, 5-meter cable with MCX connector Starter Kit Includes Lassen LP GPS module mounted on interface motherboard in a durable metal enclosure with dual DB9, RS232 interface, AC/DC power converter, magnetic-mount 3 V antenna, TSIP, NMEA and TAIP protocols, software toolkit for TSIP, interface cable and manual. Manual Lassen LP GPS Module System Designer Reference Guide © Copyright 1999, Trimble Navigation Limited. All rights reserved. The Trimble logo with Trimble is a trademark of Trimble Navi gation Limited registered in the United States Patent and Trademark Office. Lassen and Schedule Track are trademarks of Trimble Navigation Limited. All other marks are the property of their respective own ers. TID11547C (11/99) PERFORMANCE SPECIFICATIONS GeneralL1 frequency, C/A code (SPS), 8-channel, continuous tracking receiver, 32 correlators Update rateTSIP @ 1 Hz NMEA @ 1 Hz TAIP @ 1 Hz Accuracy Position 25 m CEP (50%) w/o SA Velocity0.1 m/sec without SA Time±95 nano-seconds (over-determined clock mode) DGPS accuracy Position 2 m CEP (50%) Velocity0.05 m/sec Acquisition (typical)Cold start*:< 130 seconds (90%) Warm start**:< 45 seconds (90%) Hot start***:< 20 seconds (90%) Reacquisition after signal loss< 2 seconds (90%) Dynamics Acceleration 4 g (39.2 m/sec 2 ) Motional Jerk20 m/sec 3 Operational limitsAltitude <18,000 m or velocity < 515 m/sec either limit may be exceeded but not both ENVIRONMENTAL SPECIFICATIONS Operating temp–40°C to +85°C (standard) Storage temp–55°C to +100°C Vibration0.008 g 2 /Hz5 Hz to 20 Hz 0.05 g 2 /Hz20 Hz to 100 Hz –3 dB/octave100 Hz to 900 Hz Operating humidity5% to 95% R.H. non-condensing, + 60°C Altitude–400 m to +18,000 m TECHNICAL SPECIFICATIONS Prime power+3.3 V DC, ± 0.3 V Power consumption Normal operation GPS board only: 55 mA, 0.182 W with antenna: 67 mA, 0.221 W Deep sleep8 mA, board only Backup power+3.0 to +3.6 V DC 2–5 μA at +25°C (nominal) Serial ports/1PPSCMOS TTL levels I/O ProtocolsTSIP (binary data) NMEA 0183 v2.1 (ASCII data) TAIP (ASCII data) NMEA messagesGGA, VTG, GLL, ZDA, GSA, GSV and RMC messages selectable by TSIP command; selection stored in non-volatile memory. Antenna power3.3 V at 12 mA, feedline fault detect/protect * Cold start requires no initialization ** Warm start implies last position, time and almanac are saved in battery-backed memory *** Hot start implies ephemeris also saved. All GPS receivers are subject to degradation of position and velocity accuracies under Department of Defense imposed Selective Availability (SA). Visit our website at www.trimble.com/oem Specifications subject to change without notice. Trimble Navigation Limited Corporate Headquarters 645 North Mary Avenue Sunnyvale, CA 94086 +1-408-481-8940 +1-408-481-7744 Fax www.trimble.com Trimble Navigation Europe Limited Trimble House Meridian Office Park Osborne Way Hook, Hampshire RG27 9HX U.K. +44 1256-760-150 +44 1256-760-148 Fax Trimble Navigation Singapore PTE Limited 79 Anson Road #05-02 Singapore 079906 SINGAPORE +65-325-5668 +65-225-9989 Fax

For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800. For small orders, phone 1-800-835-8769. General Description The MAX7401/MAX7405 8th-order, lowpass, Bessel, switched-capacitor filters (SCFs) operate from a single +5V (MAX7401) or +3V (MAX7405) supply. These devices draw only 2mA of supply current and allow cor- ner frequencies from 1Hz to 5kHz, making them ideal for low-power post-DAC filtering and anti-aliasing appli- cations. They feature a shutdown mode that reduces supply current to 0.2μA. Two clocking options are available on these devices: self-clocking (through the use of an external capacitor) or external clocking for tighter corner-frequency control. An offset adjust pin allows for adjustment of the DC out- put level. The MAX7401/MAX7405 Bessel filters provide low over- shoot and fast settling. Their fixed response simplifies the design task to selecting a clock frequency. Applications ADC Anti-AliasingCT2 Base Stations Post-DAC FilteringSpeech Processing Air-Bag Electronics Features ©8th-Order, Lowpass Bessel Filters ©Low Noise and Distortion: -82dB THD + Noise ©Clock-Tunable Corner Frequency (1Hz to 5kHz) ©100:1 Clock-to-Corner Ratio ©Single-Supply Operation +5V (MAX7401) +3V (MAX7405) ©Low Power 2mA (Operating Mode) 0.2μA (Shutdown Mode) ©Available in 8-Pin SO/DIP Packages ©Low Output Offset: ±5mV MAX7401/MAX7405 8th-Order, Lowpass, Bessel, Switched-Capacitor Filters ________________________________________________________________Maxim Integrated Products1 OS OUTV DD 1 2 8 7 CLK SHDNIN GND COM SO/DIP TOP VIEW 3 4 6 5 MAX7401 MAX7405 V DD IN CLK OUT GND INPUT 0.1μF 0.1μF CLOCK SHDN OUTPUT V SUPPLY COM OS MAX7401 MAX7405 Typical Operating Circuit 19-4788; Rev 1; 6/99 Pin Configuration Ordering Information PART MAX7401CPA MAX7401ESA MAX7401EPA-40°C to +85°C -40°C to +85°C 0°C to +70°C TEMP. RANGEPIN-PACKAGE 8 Plastic DIP 8 SO 8 Plastic DIP MAX7405CSA MAX7405CPA MAX7405ESA MAX7405EPA-40°C to +85°C -40°C to +85°C 0°C to +70°C 0°C to +70°C8 SO 8 Plastic DIP 8 SO 8 Plastic DIP MAX7401CSA 0°C to +70°C8 SO MAX7401/MAX7405 8th-Order, Lowpass, Bessel, Switched-Capacitor Filters 2_______________________________________________________________________________________ ABSOLUTE MAXIMUM RATINGS ELECTRICAL CHARACTERISTICS—MAX7401 (V DD = +5V, filter output measured at OUT, 10kΩ|| 50pF load to GND at OUT, OS = COM, 0.1μF from COM to GND, SHDN= V DD , f CLK = 100kHz, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.) Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. V DD to GND MAX7401 ..............................................................-0.3V to +6V MAX7405 ..............................................................-0.3V to +4V IN, OUT, COM, OS, CLK ...........................-0.3V to (V DD + 0.3V) SHDN........................................................................-0.3V to +6V OUT Short-Circuit Duration...................................................1sec Continuous Power Dissipation (T A = +70°C) 8-Pin SO (derate 5.88mW/°C above +70°C)................471mW 8-Pin DIP (derate 9.09mW/°C above +70°C) ...............727mW Operating Temperature Ranges MAX740 _C_A ....................................................0°C to +70°C MAX740 _E_A .................................................-40°C to +85°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10sec) .............................+300°C C OSC = 1000pF (Note 4) V OS = 0 to (V DD - 1V) (Note 3) SHDN= GND, V COM = 0 to V DD (Note 1) Input, COM externally driven f IN = 200Hz, V IN = 4Vp-p, measurement bandwidth = 22kHz V IN = V COM = V DD / 2 V COM = V DD / 2 (Note 2) CONDITIONS 293848f OSC Internal Oscillator Frequency ±0.1±10Input Leakage Current at OS ±0.1±10Input Leakage Current at COM 50500C L 101R L Resistive Output Load Drive 10Clock Feedthrough 75125R COM Input Resistance at COM 100:1f CLK /f C Clock-to-Corner Ratio 0.001 to 5f C Corner Frequency V COM 1A OS OS Voltage Gain to OUT -82THD+N Total Harmonic Distortion plus Noise 10Clock-to-Corner Tempco 0.25V DD - 0.25Output Voltage Range ±5±25V OFFSET Output Offset Voltage -0.10.150.3 DC Insertion Gain with Output Offset Removed MINTYPMAX SYMBOLPARAMETER V CLK = 0 or 5V 0.5V IL Clock Input Low V DD - 0.5V IH Clock Input High ±15±30I CLK Clock Input Current V V μA kHz μA μA pF kΩ mVp-p kΩ V V/ V dB dB mV V ppm/°C kHz UNITS Maximum Capacitive Load at OUT COM Voltage Range V DD / 2 V DD / 2 V DD / 2 - 0.5+ 0.5 V COM ±0.1V OS Input Voltage Range at OSV V DD / 2 V DD / 2 V DD / 2 - 0.2+ 0.2 FILTER CHARACTERISTICS CLOCK Output, COM internally biased MAX7401/MAX7405 8th-Order, Lowpass, Bessel, Switched-Capacitor Filters _______________________________________________________________________________________ 3 ELECTRICAL CHARACTERISTICS—MAX7401 (continued) (V DD = +5V, filter output measured at OUT, 10kΩ|| 50pF load to GND at OUT, OS = COM, 0.1μF from COM to GND, SHDN= V DD , f CLK = 100kHz, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.) ELECTRICAL CHARACTERISTICS—MAX7405 (V DD = +3V, filter output measured at OUT, 10kΩ|| 50pF load to GND at OUT, OS = COM, 0.1μF from COM to GND, SHDN= V DD , f CLK = 100kHz, T A = T MIN to T MAX , unless otherwise noted. Typical values are at T A = +25°C.) CONDITIONS MINTYPMAX SYMBOLPARAMETER Measured at DC SHDN= GND, CLK driven from 0 to V DD Operating mode, no load, IN = OS = COM 0.5V SDL SHDNInput Low V DD - 0.5V SDH SHDNInput High 60PSRRPower-Supply Rejection Ratio 0.21I SHDN Shutdown Current 23.5Supply CurrentI DD 4.55.5V DD Supply Voltage V V…

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COMMUNICATION SEMICONDUCTORS MX919B DATA BULLETIN 4-Level FSK Modem Data Pump ©2001 MX•COM, INC. www.mxcom.com Tele: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 20480170.003 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies. PRELIMINARY INFORMATION Features Applications • 4-Level Root Raised Cosine FSK Modulation • Half Duplex, 4800 to 19.2kbps • Increase Channel Bit Rate/Hz • Full Data Packet Framing • Impulse and NRZ Signal Modes • Enhanced Performance in Noisy Conditions • Error Detection and Error Correction • Low Power 3.3V/5.0V Operation • Wireless Data Terminals • Two Way Paging Systems • Digital Radio Systems • Wide Area Wireless Data Broadcasts • Point to Point Wireless Data Links MODEM DATA PUMP MX919B ANALOG TX DATA AND CONTROL BUS ANALOG RX RF RADIO DISCRIMINATOR MODULATOR SYSTEM APPLICATION PROCESSING HOST Cμ The MX919B is a low voltage CMOS device containing all of the baseband signal processing and Medium Access Control (MAC) protocol functions required for a high performance 4-level FSK Wireless Packet Data Modem. It interfaces with the modem host μC and the radio modulation/demodulation circuits to deliver reliable two-way transfer of the application data over a wireless link. The MX919B assembles application data received from the host μC, adds forward error correction (FEC) and error detection (CRC) information, and interleaves the result for burst-error protection. After automatically adding symbol and frame sync codewords, the data packet is converted into filtered 4-level analog signals for modulating the radio transmitter. In receive mode, the MX919B performs the reverse function using the analog signals from the receiver discriminator. After error correction and removal of the packet overhead, the recovered application data is supplied to the host μC. CRC detected residual uncorrected data errors will be flagged. A readout of the SNR value during receipt of a packet is also provided. The MX919B uses data block sizes and FEC/CRC suitable for applications where high-speed transfer of data over narrow-band wireless links is required. The device is programmable to operate at standard bit rates from a wide range of Xtal/clock frequencies. The MX919B may be used with a 3.0V to 5.5V power supply and is available in the following package styles: 24-pin SSOP (MX919BDS), 24-pin SOIC (MX919BDW), 24-pin PLCC (MX919BLH), and 24-pin PDIP (MX919BP). 4-Level FSK Modem Data Pump Page 2 of 47 MX919B PRELIMINARY INFORMATION ©2001 MX•COM, INC. www.mxcom.com Tele: 800 638 5577 336 744 5050 Fax: 336 744 5054 Doc. # 20480170.003 4800 Bethania Station Road, Winston-Salem, NC 27105-1201 USA All trademarks and service marks are held by their respective companies. CONTENTS Section Page 1. Block Diagram ............................................................................................................... 6 2. Signal List ...................................................................................................................... 7 3. External Components ................................................................................................... 8 4. General Description ...................................................................................................... 9 4.1 Description of Blocks ......................................................................................................... 9 4.1.1 Data Bus Buffers..................................................................................................................... 9 4.1.2 Address and R/W Decode ...................................................................................................... 9 4.1.3 Status and Data Quality Registers.......................................................................................... 9 4.1.4 Command, Mode, and Control Registers ............................................................................... 9 4.1.5 Data Buffer.............................................................................................................................. 9 4.1.6 CRC Generator/Checker ........................................................................................................ 9 4.1.7 FEC Generator/Checker .............................................................................…

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